ISL8200AM INTERSIL [Intersil Corporation], ISL8200AM Datasheet - Page 13

• Manufacturer Part Number: ISL8200AM
• Description: Complete Current Share 10A DC/DC Power Module
• Manufacturer: INTERSIL [Intersil Corporation]

Applications Information
Programming the Output Voltage (R
The ISL8200AM has an internal 0.6V ± 0.7% reference voltage.
Programming the output voltage requires a dividing resistor
(R
The output voltage can be calculated as shown in Equation 1:
Note: ISL8200AM has integrated 2.2kΩ resistances into the
module dividing resistor for the bottom side (R
resistances for different output voltages in single phase
operation are listed in Table 1. For a parallel setup, please refer
to the current sharing application note (Coming Soon).
The output voltage accuracy can be improved by maintaining the
impedance at V
effective impedance. Note: the impedance between V
V
The module has a minimum input voltage at a given output
voltage, which needs to be a minimum of 1.43 times the output
voltage if operating at F
due to the Minimum PWM OFF Time (t
The equation to determine the minimum PV
required V
to add 0.5V to the result to account for temperature variations.
t
for the 700kHz switching frequency = 1428ns
For 3.3V input voltage operation, the VIN voltage is
recommended to be 5V for sufficient gate drive voltage. This can
be accomplished by using a voltage greater than or equal to 5V
on VIN, or directly connecting the 5V source to both VIN and
PVCC.
VIN is the input to the internal LDO that powers the control
circuitry while PVCC is the output of the aforementioned LDO.
PVIN is the power input to the power stage. Figure 21 shows a
scenario where the power stage is running at 3.3V and the
control circuitry is running at 5.0V; keep in mind that the PVCC
pin is also at 5.0V to ensure that the LDO is not functioning.
Figure 22 shows a setup where both the control circuitry and the
PV
PV
V
SW
SEN1-
OUT
SET
IN_MIN
IN_MIN
= switching period = 1/F
) between the VOUT_SET pin and the V
=
V
R
V
R
V
R
OUT
OUT
OUT
is about 500kΩ.
SET
SET
SET
0.6
=
=
OUT
×
---------------------------------------
t
1.43
SW
⎛
⎜
⎝
V
1
is given by Equations 2 and 3; it is recommended
OUT
OUTSET
+
–
×
t
R
------------ -
R
MIN_OFF
V
×
SET
OS
OUT
3.32kΩ
t
10kΩ
SW
0.6V
1.5V
3.3V
⎞
⎟
⎠
0Ω
TABLE 1. V
(internal V
SW
= 700kHz switching frequency. This is
SW
13
OUT
SEN1+
4.42kΩ
16.2kΩ
732Ω
1.8V
0.8V
5.0V
- R
MIN-OFF
SET
) at or below 1kΩ
OUT
IN
).
1.47kΩ
5.11kΩ
OS
to support the
20kΩ
1.0V
2.0V
6.0V
regulation point.
). The
SET
SEN1+
)
ISL8200AM
6.98kΩ
2.2kΩ
(EQ. 1)
(EQ. 2)
(EQ. 3)
1.2V
2.5V
and
power stage is at a 5.0V rail. It is imperative to not cross 5.5V in
this setup as that is the voltage limit on the PVCC pin. Figure 23
is a more general setup and can accommodate VIN ranges up to
20V; PVCC is not tied to VIN and hence the control circuitry is
powered by the internal LDO.
The circuit shown in Figure 24 ensures proper startup by injecting
current into the ISHARE line until all phases are ready to start
regulating.
DO NOT CROSS 5.5V
P
V
VIN
IN
V
V
IN
= 5.0V
IN
= 3.3V
= 5.0V
V
= 5V-20V
V
EN
V
EN
EN
FIGURE 23. 5V TO 20V OPERATION
PVIN
EN
FF
ISHARE
PVIN
VIN
VIN
EN
FF
ISHARE
FIGURE 21. 3.3V OPERATION
PVIN
ISHARE
FIGURE 22. 5.0V OPERATION
VIN
EN
FF
5k
5k
5k
POWER MODULE
POWER MODULE
POWER MODULE
ISL8200AM
ISL8200AM
ISL8200AM
VSEN_REM-
VSEN_REM-
VOUT_SET
VOUT_SET
VSEN_REM-
P
VOUT_SET
VCC
P
10µF
10µF
PGND1
10µF
PGND1
VCC
VOUT
VOUT
PGND1
= 5.0V
VOUT
= V
IN
September 13, 2012
R
R
V
V
R
SET
SET
OUT
V
OUT
SET
OUT
FN8271.2