LMH6601Q NSC [National Semiconductor], LMH6601Q Datasheet - Page 25

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LMH6601Q

Manufacturer Part Number
LMH6601Q
Description
250 MHz, 2.4V CMOS Operational Amplifier with Shutdown
Manufacturer
NSC [National Semiconductor]
Datasheet

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TRANSIMPEDANCE AMPLIFIER NOISE
CONSIDERATIONS
When analyzing the noise at the output of the I-V converter,
it is important to note that the various noise sources (i.e. op
amp noise voltage, feedback resistor thermal noise, input
noise current, photodiode noise current) do not all operate
over the same frequency band. Therefore, when the noise at
the output is calculated, this should be taken into account.
The op amp noise voltage will be gained up in the region be-
tween the noise gain’s “zero” and its “pole” (f
14). The higher the values of R
gain peaking starts and therefore its contribution to the total
output noise would be larger. It is obvious to note that it is
advantageous to minimize C
amp, by applying a reverse bias across the diode at the ex-
pense of excess dark current and noise). However, most low
noise op amps have a higher input capacitance compared to
ordinary op amps. This is due to the low noise op amp’s larger
input stage.
OTHER APPLICATIONS
CAPACITIVE LOAD
The LMH6601 can drive a capacitive load of up to 1000 pF
with correct isolation and compensation. Figure 16 illustrates
the in-loop compensation technique to drive a large capacitive
load.
FIGURE 15. Charge Preamplifier Taking Advantage of
LMH6601’s Femto-Ampere Range Input Bias Current
IN
F
and C
(e.g. by proper choice of op
IN
, the sooner the noise
z
and f
p
in Figure
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25
When driving a high capacitive load, an isolation resistor
(R
put and the capacitive load to provide isolation and to avoid
oscillations. A small value capacitor (C
the op amp output and the inverting input as shown such that
this capacitor becomes the dominant feedback path at higher
frequency. Together these components allow heavy capaci-
tive loading while keeping the loop stable.
There are few factors which affect the driving capability of the
op amp:
Table 4 shows the measured step response for various values
of load capacitors (C
sistor (C
* Response limited by input step generator rise time of 5 ns
Figure 17 shows the increase in rise/fall time (bandwidth de-
crease) at V
trade-off between the two:
FIGURE 16. In-Loop Compensation Circuit for Driving a
TABLE 4. LMH6601 Step Response Summary for the
S
Op amp internal architecture
Closed loop gain and output capacitor loading
) should be connected in series between the op amp out-
(pF)
110
300
500
910
C
10
50
L
F
) with gain of +2 (R
OUT
192
(Ω)
R
47
80
0
0
6
S
with larger capacitive loads, illustrating the
Heavy Capacitive Load
Circuit of Figure 16
L
), series resistor (R
(pF)
C
10
10
10
1
1
1
F
F
= R
G
t
= 604Ω) and R
rise
(ns)
10
12
33
65
6*
7*
F
/ t
) is inserted between
fall
S
) and feedback re-
Overshoot
www.national.com
L
(%)
16
20
10
10
= 2 kΩ:
8
6
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