ISL8023 INTERSIL [Intersil Corporation], ISL8023 Datasheet - Page 14

• Manufacturer Part Number: ISL8023
• Description: 3A/4A Low Quiescent Current High Efficiency Synchronous Buck Regulator
• Manufacturer: INTERSIL [Intersil Corporation]

Frequency Adjust
The frequency of operation is fixed at 1MHz and internal
compensation when FS is tied to VIN. Adjustable frequency range
from 500kHz to 4MHz via simple resistor connecting FS to SGND
according to Equation 1:
R
Overcurrent Protection
The overcurrent protection is realized by monitoring the CSA
output with the OCP comparator, as shown in Figure 4. The current
sensing circuit has a gain of 200mV/A, from the P-FET current to
the CSA output. When the CSA output reaches the threshold, the
OCP comparator is trippled to turn off the P-FET immediately. The
overcurrent function protects the switching converter from a
shorted output by monitoring the current flowing through the
upper MOSFET.
Upon detection of overcurrent condition, the upper MOSFET will
be immediately turned off and will not be turned on again until
the next switching cycle. Upon detection of the initial overcurrent
condition, the overcurrent fault counter is set to 1. If, on the
subsequent cycle, another overcurrent condition is detected, the
OC fault counter will be incremented. If there are 17 sequential
OC fault detections, the regulator will be shut down under an
overcurrent fault condition. An overcurrent fault condition will
result in the regulator attempting to restart in a hiccup mode
within the delay of eighth soft-start periods. At the end of the
eight soft-start wait period, the fault counters are reset and
T
[
kΩ
CLOCK
V
OUT
]
=
I
L
0
----------------------------- - 14
f
OSC
220 10
⋅
[
kHz
3
]
8 CYCLES
–
PWM
NOMINAL +1.5%
14
FIGURE 40. SKIP MODE OPERATION WAVEFORMS
ISL8023, ISL8024
PFM CURRENT LIMIT
LOAD CURRENT
NOMINAL
(EQ. 1)
PFM
soft-start is attempted again. If the overcurrent condition goes
away during the delay of four soft-start periods, the output will
resume back into regulation point after hiccup mode expires.
Negative current Protection
Similar to the overcurrent, the negative current protection is
realized by monitoring the current across the low-side N-FET, as
shown in Figure 4 on page 7. When the valley point of the inductor
current reached -3A for 4 consecutive cycles, both P-FET and N-FET
are off. The 100Ω in parallel to the N-FET will activate discharging
the output into regulation. The control will begin to switch when
output is within regulation. The regulator will be in PFM for 20µs
before switching to PWM if necessary.
PG
PG is an open-drain output of a window comparator that
continuously monitors the buck regulator output voltage. PG is
actively held low when EN is low and during the buck regulator
soft-start period. After 1ms delay of the soft-start period, PG
becomes high impedance as long as the output voltage is within
nominal regulation voltage set by VFB. When VFB drops 15% below
or raises 0.6V above the nominal regulation voltage, the ISL8023,
ISL8024 pulls PG low. Any fault condition forces PG low until the
fault condition is cleared by attempts to soft-start. For logic level
output voltages, connect an external pull-up resistor, R
PG and VIN. A 100kΩ resistor works well in most applications.
UVLO
When the input voltage is below the undervoltage lock-out (UVLO)
threshold, the regulator is disabled.
NOMINAL -1.5%
PWM
December 22, 2011
1
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FN7812.0