ADM1232AARM AD [Analog Devices], ADM1232AARM Datasheet - Page 2
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ADM1232AARM
Manufacturer Part Number
ADM1232AARM
Description
Microprocessor Supervisory Circuit
Manufacturer
AD [Analog Devices]
Datasheet
1.ADM1232AARM.pdf
(6 pages)
P
TEMPERATURE
POWER SUPPLY
STROBE AND PB RESET INPUTS
INPUT LEAKAGE CURRENT
OUTPUT CURRENT
OUTPUT VOLTAGE
1 V OPERATION
V
CAPACITANCE
PB RESET
RESET ACTIVE TIME
STROBE
V
V
Specifications subject to change without notice.
ADM1232A–SPECIFICATIONS
CC
CC
CC
arameter
Voltage
Current
Input High Level
Input Low Level
(STROBE, TOLERANCE)
TD
RESET
RESET, RESET
RESET/RESET
RESET/RESET High Level
RESET/RESET Low Level
RESET Output Voltage
RESET Output Voltage
5%
10%
Input (STROBE, TOLERANCE)
Output (RESET, RESET)
Time
Delay
Pulsewidth
Timeout Period
Fall Time
Rise Time
RESET AND RESET Are Logically Correct
FAIL DETECT TO RESET OUTPUT DELAY
TRIP POINT
Min
–40
4.5
2.0
–0.3
–1.0
8
–8
V
2.4
4.5
4.25
20
1
250
20
62.5
250
500
10
0
250
CC
– 0.5 V
(V
CC
Typ
5.0
20
200
1.6
10
–12
V
0.1
4.62
4.37
4
610
150
600
1200
610
CC
CC
= Full Operating Range, T
– 0.1
– 0.1
–2–
Max
+85
5.5
50
500
V
+0.8
+1.0
0.4
4.74
4.49
5
7
20
1000
250
1000
2000
50
1000
CC
+ 0.3 V
Units
V
V
mA
mA
V
V
V
V
V
V
V
pF
pF
ms
ms
ms
ns
ms
ms
ms
ms
C
A
A
A
A
S
S
s
A
= T
Test Conditions/Comments
T
V
V
When V
When V
While sourcing less than 500 A, RESET remains
within 0.5 V of V
drops below 2.0 V. While sinking less than
500 A, RESET remains within 0.5 V of GND
on power-down until V
While Sourcing Less than 50 A
While Sinking Less than 50 A
TOLERANCE = GND
TOLERANCE = V
T
T
PB RESET Must Be Held Low for a Minimum
of 20 ms to Guarantee a Reset
TD = 0 V
TD = Floating
TD = V
Guaranteed by Design
Guaranteed by Design
After V
(Figure 5)
After V
IL
IL
A
A
A
MIN
, V
, V
= T
= +25 C
= +25 C
to T
IH
IH
CC
CC
MIN
CC
CC
CC
= CMOS Levels
= TTL Levels
MAX
Falls Below the Set Tolerance Voltage
Rises Above the Set Tolerance Voltage
to T
Is at 4.5 V–5.5 V
Is at 4.5 V–5.5 V
unless otherwise noted)
MAX
CC
CC
on power-down until V
CC
drops below 2.0 V.
REV. 0
CC