ISL6256 INTERSIL [Intersil Corporation], ISL6256 Datasheet - Page 22

• Manufacturer Part Number: ISL6256
• Description: Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers
• Manufacturer: INTERSIL [Intersil Corporation]

A filter should be added between R
reduce switching noise. The filter roll off frequency should be
between the crossover frequency and the switching
frequency (~100kHz).
Voltage Control Loop
When the battery is charged to the voltage set by CELLS and
VADJ the voltage error amplifier (gm1) takes control of the
output (assuming that the adapter current is below the limit set
by ACLIM). The voltage error amplifier (gm1) discharges the
cap on VCOMP to limit the output voltage. The current to the
battery decreases as the cells charge to the fixed voltage and
the voltage across the internal battery resistance decreases.
As battery current decreases the 2 current error amplifiers
(gm2 and gm3) output their maximum current and charge the
capacitor on ICOMP to its maximum voltage (limited to 1.2V
above VCOMP). With high voltage on ICOMP, the minimum
voltage buffer output equals the voltage on VCOMP.
The voltage control loop is shown in Figure 22.
Output LC Filter Transfer Functions
The gain from the phase node to the system output and
battery depend entirely on external components. Typical
output LC filter response is shown in Figure 23. Transfer
function A
A
ω
LC
VCOMP
ESR
C VCOMP
R
=
VCOMP
---------------------------------------------------------- -
⎛
⎜
⎝
=
----------- -
ω
Σ
S
s
-------------------------------- -
(
DP
R
LC
2
FIGURE 22. VOLTAGE CONTROL LOOP
ESR
⎛
⎝
(s) is shown in Equation 38:
+
1
1
–
------------------------ -
(
11
ω
⋅
---------------
ω
0.25
2.1V
LC
C
gm1
ESR
s
s
o
+
-
-
+
⋅
)
PHASE
Q
⎞
⎠
+
-
)
+
1
R FET_r
ω
CA2
⎞
⎟
⎠
LC
R4
22
20
R3
=
+
-
DS(ON)
----------------------- -
(
L C
S1
1
⋅
CSON
CSOP
and CSIP and CSIN to
L
o
)
R
Q
L_DCR
C F2
C
R
ESR
O
=
R
R
F2
o
ISL6256, ISL6256A
(EQ. 38)
⋅
R
R
------ -
C
S2
BAT
L
o
The resistance R
inductor DCR, R
battery (normally between 50mΩ and 200mΩ). The worst case
for voltage mode control is when the battery is absent. This
results in the highest Q of the LC filter and the lowest phase
margin.
The compensation network consists of the voltage error
amplifier gm1 and the compensation network R
C
frequency pole and a zero at f
information is added to the feedback to create a second zero
f
ISL6256 add a pole at f
resistors that set the DC output voltage. For a 3-cell battery,
R
44 relate the compensation network’s poles, zeros and gain to
the components in Figure 22. Figure 2424 shows an
asymptotic bode plot of the DC/DC converter’s gain vs
frequency. It is strongly recommended that f
approximately 30% of f
of f
ZERO2
FIGURE 23. FREQUENCY RESPONSE OF THE LC OUTPUT
VCOMP
3
-100
-120
-140
-160
LC.
= 320kΩ and R
-10
-20
-30
-40
-50
-60
-20
-40
-60
-80
20
10
0
100 200
. The low pass filter R
R
which give the loop very high DC gain, a very low
BATTERY
FILTER
500 1k
SENSE
O
R
is a combination of MOSFET r
4
= 200mΩ
BATTERY
= 64kΩ. Equations 39, 40, 41, 42, 43 and
LC
FILTER
and the internal resistance of the
2k
and f
= 50mΩ
FREQUENCY
F2
ZERO1
5k 10k 20k
. R
ZERO2
, C
3
F2
and R
. Inductor current
between R
is approximately 70%
4
are internal divider
ZERO1
50k 100k 200k 500k
NO BATTERY
VCOMP
September 14, 2010
DS(ON)
SENSE
is
,
FN6499.3
,
and