PIC18F4410 MICROCHIP [Microchip Technology], PIC18F4410 Datasheet - Page 248

• Manufacturer Part Number: PIC18F4410
• Description: 28/40/44-Pin Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F2X1X/4X1X
22.2
For PIC18F2X1X/4X1X devices, the WDT is driven by
the INTRC source. When the WDT is enabled, the
clock source is also enabled. The nominal WDT period
is 4 ms and has the same stability as the INTRC
oscillator.
The 4 ms period of the WDT is multiplied by a 16-bit
postscaler. Any output of the WDT postscaler is
selected by a multiplexer, controlled by bits in Configu-
ration Register 2H. Available periods range from 4 ms
to 131.072 seconds (2.18 minutes). The WDT and
postscaler are cleared when any of the following events
occur: a SLEEP or CLRWDT instruction is executed, the
IRCF bits (OSCCON<6:4>) are changed or a clock
failure has occurred.
FIGURE 22-1:
DS39636C-page 246
Change on IRCF bits
All Device Resets
Watchdog Timer (WDT)
INTRC Source
WDTPS<3:0>
SWDTEN
CLRWDT
WDTEN
Sleep
WDT BLOCK DIAGRAM
Enable WDT
WDT Counter
÷128
4
Preliminary
Programmable Postscaler
1:1 to 1:32,768
22.2.1
Register 22-14 shows the WDTCON register. This is a
readable and writable register which contains a control
bit that allows software to override the WDT Configura-
tion bit, but only if the Configuration bit has disabled the
WDT.
Note 1: The CLRWDT and SLEEP instructions
2: Changing the setting of the IRCF bits
3: When a CLRWDT instruction is executed,
CONTROL REGISTER
clear the WDT and postscaler counts
when executed.
(OSCCON<6:4>) clears the WDT and
postscaler counts.
the postscaler count will be cleared.
Reset
© 2007 Microchip Technology Inc.
Wake-up From
Power-Managed
Modes
WDT
Reset