LAN9313I SMSC [SMSC Corporation], LAN9313I Datasheet - Page 190

• Manufacturer Part Number: LAN9313I
• Description: Three Port 10/100 Managed Ethernet Switch with MII
• Manufacturer: SMSC [SMSC Corporation]

Revision 1.2 (04-08-08)
BITS
3
2
1
0
1588 Port 0(External MII) TX Interrupt (1588_MII_TX_INT)
This interrupt indicates that a packet from the External MII to the switch
fabric matches the configured PTP packet and the 1588 clock was captured.
Note:
1588 GPIO9 Interrupt (1588_GPIO9_INT)
This interrupt indicates that an event on GPIO9 occurred and the 1588 clock
was captured. These interrupts are configured through the
I/O Configuration Register (GPIO_CFG)
Note:
1588 GPIO8 Interrupt (1588_GPIO8_INT)
This interrupt indicates that an event on GPIO8 occurred and the 1588 clock
was captured. These interrupts are configured through the
I/O Configuration Register (GPIO_CFG)
Note:
1588 Timer Interrupt (1588_TIMER_INT)
This interrupt indicates that the 1588 clock equaled or passed the Clock
Target value in the
(1588_CLOCK_TARGET_HI)
(1588_CLOCK_TARGET_LO).
Note:
For Port 0, receive is defined as data from the switch fabric, while
transmit is to the switch fabric.
As 1588 capture inputs, GPIO inputs are edge sensitive and must
be active for greater than 40 nS to be recognized as interrupt
inputs.
As 1588 capture inputs, GPIO inputs are edge sensitive and must
be active for greater than 40 nS to be recognized as interrupt
inputs.
This bit is also cleared by an active edge on GPIO[9:8] if enabled.
For the clear function, GPIO inputs are edge sensitive and must be
active for greater than 40 nS to be recognized as a clear input.
Refer to
additional information.
Section 12.2, "GPIO Operation," on page 142
1588 Clock Target High-DWORD Register
and
DESCRIPTION
1588 Clock Target Low-DWORD Register
DATASHEET
register.
register.
190
General Purpose
General Purpose
for
Three Port 10/100 Managed Ethernet Switch with MII
R/WC
R/WC
R/WC
R/WC
TYPE
SMSC LAN9313/LAN9313i
DEFAULT
Datasheet
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