MC68HC705J1AC FREESCALE [Freescale Semiconductor, Inc], MC68HC705J1AC Datasheet - Page 90

• Manufacturer Part Number: MC68HC705J1AC
• Description: Microcontrollers
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Parallel Input/Output (I/O) Ports
6.3.2 Data Direction Register A
Technical Data
NOTE:
Address:
Data direction register A (DDRA) determines whether each port A pin is
an input or an output.
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 6-4
Reset:
Read:
Write:
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
READ DDRA
WRITE DDRA
WRITE PORTA
READ PORTA
WRITE PDRA
DDRA7
$0004
Bit 7
0
Parallel Input/Output (I/O) Ports
Figure 6-3. Data Direction Register A (DDRA)
shows the I/O logic of port A.
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DDRA6
RESET
6
0
Figure 6-4. Port A I/O Circuitry
DDRA5
5
0
DDRAx
PDRAx
PAx
DDRA4
4
0
DDRA3
3
0
SWPDI
MC68HC705J1A — Rev. 4.0
DDRA2
2
0
10-mA SINK CAPABILITY
(PINS PA4–PA7 ONLY)
DDRA1
100- A
PULLDOWN
1
0
PAx
(PA0–PA3 TO
IRQ MODULE)
DDRA0
Bit 0
0