MC68HC705BD3 FREESCALE [Freescale Semiconductor, Inc], MC68HC705BD3 Datasheet - Page 21

• Manufacturer Part Number: MC68HC705BD3
• Description: High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

This section provides a description of the functional pins and I/O programming of the
MC68HC05BD3 microcontroller.
2.1
MC68HC05BD3
VDD, VSS
IRQ/ VPP
RESET
XTAL, EXTAL
PA0-PA7
PB0-PB5
PC0/PWM8
to
PC5/PWM13
PIN NAME
PIN DESCRIPTION AND I/O PORTS
PIN DESCRIPTIONS
40-pin DIP
PIN No.
23-16
26-31
14-9
5, 6
7, 8
15
4
PIN DESCRIPTION AND I/O PORTS
42-pin SDIP
PIN No.
24-17
15-10
27-32
5, 7
8, 9
16
4
2
Power is supplied to the MCU using these two pins. VDD is power and
VSS is ground.
In the user mode this pin an external hardware interrupt IRQ. It is
software programmable to provide two choices of interrupt triggering
sensitivity. These options are:
In the bootstrap mode on the MC68HC705BD3, this is the EPROM
programming voltage input pin.
The active low RESET input is not required for start-up, but can be
used to reset the MCU internal state and provide an orderly software
start-up procedure.
These pins provide connections to the on-chip oscillator. The
oscillator can be driven by a AT-crystal circuit or a ceramic resonator
with a frequency of 4.2 MHz. EXTAL may also be driven by an
external oscillator if an external crystal/resonator circuit is not used.
See Figure 11-3 for values of crystal circuit external components.
These eight I/O lines comprise port A. The state of any pin is software
programmable. All port A lines are configured as input during power
on or external reset.
These six I/O lines comprise port B. The state of any pin is software
programmable. All port B lines are configured as input during power
on or external reset. PB2 to PB5 are +10V open-drain pins.
These six port C pins are +10V open-drain type. The state of any pin
is software programmable. All port C lines are configured as input
during power on or external reset.
These pins become PWM output channels 8 to 13 by setting the
appropriate bits in Configuration register 1 ($0A).
1) negative edge-sensitive triggering only, or
2) both negative edge-sensitive and level sensitive triggering.
DESCRIPTION
TPG
2-1
2