LM4546AVH NSC [National Semiconductor], LM4546AVH Datasheet - Page 5

• Manufacturer Part Number: LM4546AVH
• Description: AC 97 Rev 2 Multi-Channel Audio Codec with Sample Rate Conversion and National 3D Sound
• Manufacturer: NSC [National Semiconductor]

T
T
T
T
T
T
T
T
T
FALL
RST_LOW
RST2CLK
SH
SYNC2CLK
S2_PDOWN
SUPPLY2RST
SU2RST
RST2HZ
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions
which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters
where no limit is given, however, the typical value is a good indication of device performance.
Note 2: Human body model, 100 pF discharged through a 1.5 kΩ resistor.
Note 3: Machine Model, 220 pF – 240 pF discharged through all pins.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation is P
C. The typical junction-to-ambient thermal resistance is 74°C/W for package number VBH48A.
Note 5: All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 6: Typicals are measured at 25°C and represent the parametric norm.
Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).
Note 8: Loopthrough mode describes a path from an analog input through the analog mixers to an analog output.
Note 9: These specifications are guaranteed by design and characterization; they are not production tested.
Note 10: Out of band energy is measured from 28.8 kHz to 100 kHz relative to a 1 Vrms DAC output.
Symbol
Fall Time
RESET# active low pulse width
RESET# inactive to BIT_CLK start up For Cold Reset
SYNC active high pulse width
SYNC inactive to BIT_CLK start up
AC Link Power Down Delay
Power On Reset
Setup to trailing edge of RESET#
Rising edge of RESET# to Hi-Z
DMAX
Parameter
= (T
JMAX
200308 Version 5 Revision 1
– T
A
)/θ
JA
or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4546A, T
BIT_CLK, SYNC, SDATA_IN or
SDATA_OUT
For Cold Reset
For Warm Reset
For Warm Reset
Delay from end of Slot 2 to BIT_CLK,
SDATA_IN low
Time from minimum valid supply levels to
end of Reset
For ATE Test Mode
For ATE Test Mode
Print Date/Time: 2009/07/15 15:26:52
5
Conditions
JMAX
, θ
JA
, and the ambient temperature T
(Note 6)
Typical
TBD
TBD
1.3
LM4546A
(Note 7)
162.8
162.8
Limit
TBD
1.0
15
25
6
1
1
A
. The maximum
www.national.com
JMAX
ns (max)
µs (max)
ns (max)
(Limits)
µs (min)
ns (min)
µs (min)
ns (min)
µs (min)
ns (min)
Units
= 150°