PIC18F23K20 MICROCHIP [Microchip Technology], PIC18F23K20 Datasheet - Page 178
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PIC18F23K20
Manufacturer Part Number
PIC18F23K20
Description
28/40/44-Pin Flash Microcontrollers with nanoWatt XLP Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F23K20.pdf
(456 pages)
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PIC18F2XK20/4XK20
16.4.1
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the CCPx/P1A pin, while the complementary PWM
output signal is output on the P1B pin (see
Figure 16-5). This mode can be used for Half-Bridge
applications, as shown in Figure 16-5, or for Full-Bridge
applications, where four power switches are being
modulated with two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
Half-Bridge power devices. The value of the PDC<6:0>
bits of the PWM1CON register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. See
Section 16.4.6 “Programmable Dead-Band Delay
mode” for more details of the dead-band delay
operations.
FIGURE 16-5:
DS41303G-page 178
Standard Half-Bridge Circuit (“Push-Pull”)
Half-Bridge Output Driving a Full-Bridge Circuit
HALF-BRIDGE MODE
EXAMPLE OF HALF-BRIDGE APPLICATIONS
P1A
P1B
P1A
P1B
FET
Driver
FET
Driver
FET
Driver
FET
Driver
Since the P1A and P1B outputs are multiplexed with
the PORT data latches, the associated TRIS bits must
be cleared to configure P1A and P1B as outputs.
FIGURE 16-4:
P1A
P1B
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
Load
V+
(2)
(2)
2: Output signals are shown as active-high.
(1)
PR2 register.
td
Pulse Width
Load
Period
td
FET
Driver
FET
Driver
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
2010 Microchip Technology Inc.
+
-
+
-
(1)
Period
(1)
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