PIC18F1220 MICROCHIP [Microchip Technology], PIC18F1220 Datasheet - Page 204

• Manufacturer Part Number: PIC18F1220
• Description: 18/20/28-Pin High-Performance, Enhanced Flash Microcontrollers with 10-bit A/D and nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC18F1220/1320
BNOV
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
DS39605C-page 202
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Overflow
If Overflow
Q1
Q1
No
PC
PC
Read literal
Read literal
operation
Branch if Not Overflow
[ label ] BNOV
-128
if Overflow bit is ‘0’
(PC) + 2 + 2n
None
If the Overflow bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
1110
Q2
Q2
No
‘n’
‘n’
=
=
=
=
=
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
127
0101
BNOV Jump
operation
Process
Process
Data
Data
Q3
Q3
No
PC
n
nnnn
Write to PC
operation
operation
Q4
Q4
No
No
nnnn
BNZ
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
If Jump:
If No Jump:
Before Instruction
After Instruction
operation
Decode
Decode
PC
If Zero
If Zero
Q1
Q1
No
PC
PC
Read literal
Read literal
operation
Branch if Not Zero
[ label ] BNZ
-128
if Zero bit is ‘0’
(PC) + 2 + 2n
None
If the Zero bit is ‘0’, then the
program will branch.
The 2’s complement number ‘2n’ is
added to the PC. Since the PC will
have incremented to fetch the next
instruction, the new address will be
PC + 2 + 2n. This instruction is then
a two-cycle instruction.
1
1(2)
HERE
1110
Q2
Q2
No
‘n’
‘n’
=
=
=
=
=
 2004 Microchip Technology Inc.
n
address (HERE)
0;
address (Jump)
1;
address (HERE + 2)
127
0001
BNZ
operation
Process
Process
Data
Data
Q3
Q3
No
n
PC
Jump
nnnn
Write to PC
operation
operation
Q4
Q4
No
No
nnnn