DP83848K_08 NSC [National Semiconductor], DP83848K_08 Datasheet - Page 77

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DP83848K_08

Manufacturer Part Number
DP83848K_08
Description
Manufacturer
NSC [National Semiconductor]
Datasheet
8.2.26 Isolation Timing
8.2.27 100 Mb/s X1 to TX_CLK Timing
Note: X1 to TX_CLK timing is provided to support devices that use X1 instead of TX_CLK as the reference for transmit
Mll data.
T2.27.1
T2.26.1
T2.26.2
Parameter
Parameter
Clear bit 10 of BMCR
(return to normal operation
from Isolate mode)
(with PHYAD = 00000)
H/W or S/W Reset
X1 to TX_CLK delay
From software clear of bit 10 in
the BMCR register to the transi-
tion from Isolate to Normal Mode
From Deassertion of S/W or H/W
Reset to transition from Isolate to
Normal mode
TX_CLK
MODE
X1
Description
Description
77
100 Mb/s Normal mode
Notes
T2.26.1
T2.26.2
T2.27.1
Notes
ISOLATE
Min
Min
0
NORMAL
Typ
Typ
www.national.com
Max
100
500
Max
5
Units
Units
ns
s
s

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