PIC17C42A MICROCHIP [Microchip Technology], PIC17C42A Datasheet

PIC17C42A

Manufacturer Part Number

PIC17C42A

Description

EPROM Memory Programming Specification

Manufacturer

MICROCHIP [Microchip Technology]

Datasheet

1.PIC17C42A.pdf (16 pages)

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PIN DESCRIPTIONS (DURING PROGRAMMING): PIC17C42/42A/43/44

This document includes the programming

speciﬁcations for the following devices:

• PIC17C42

• PIC17C42A

• PIC17CR42

1.0

The PIC17CXX is programmed using the TABLWT

instruction. The table pointer points to the internal

EPROM location start. Therefore, a user can program

an EPROM location while executing code (even from

internal EPROM). This programming speciﬁcation

applies to PIC17CXX devices in all packages.

For the convenience of a programmer developer, a

“program & verify” routine is provided in the on-chip test

program memory space, the program resides in ROM

and not EPROM. Therefore, it is not erasable. The

“program/verify” routine allows the user to load any

address, program a location, verify a location or incre-

ment to the next location. It allows variable program-

ming pulse width.

1.1

Since the PIC17CXX under programming is actually

executing code from “boot ROM,” a clock must be pro-

vided to the part. Furthermore, the PIC17CXX under

programming may have any oscillator conﬁguration

(EC, XT, LF or RC). Therefore, the external clock driver

must be able to overdrive pulldown in RC mode. CMOS

drivers are required since the OSC1 input has a

Schmitt trigger input with levels (typically) of 0.2V

and

(DS30412A) for exact speciﬁcations.

Legend: I = Input, O = Output, P = Power

1996 Microchip Technology Inc.

0.8V

MCLR/V

Pin Name

RC <7:0>

RA <0:4>

RB <7:0>

PROGRAMMING THE PIC17CXX

Hardware Requirements

TEST

EPROM Memory Programming Speciﬁcation

See

the

• PIC17C43

• PIC17CR43

• PIC17C44

PIC17C4X

PAD <15:8>

This document was created with FrameMaker 4 0 4

PAD <7:0>

Pin Name

RA <0:4>

TEST

data

sheet

Pin Type

I/O

During Programming

Pin Diagram

The PIC17CXX requires two programmable power

supplies, one for V

one for V

minimum resolution of 0.25V.

The PIC17CXX uses an intelligent algorithm. The algo-

rithm calls for program veriﬁcation at V

“erase margin”. Veriﬁcation at V

good “program margin”. Three times (3X) additional

pulses will increase program margin then beyond V

(max.) and insure safe operation in user system.

Necessary in programming mode

Must be set to “high” to enter programming mode

Address & data: high byte

Address & data: low byte

Programming Power

Power Supply

Ground

OSC2/CLKOUT

40L PDIP, Windowed CERDIP

OSC1/CLKIN

RB4/TCLK12

RB5/TCLK3

RB2/PWM1

RB3/PWM2

RB0/CAP1

RB1/CAP2

max. Veriﬁcation at V

RC0/AD0

RC1/AD1

RC2/AD2

RC3/AD3

RC4/AD4

RC5/AD5

RC6/AD6

RC7/AD7

RB6

RB7

PIC17CXX

(13

0.25V). Both supplies should have a

Pin Description

(2.5V to 6.0V recommended) and

min guarantees good

max guarantees

DS30139I-page 1

min as well as

RD0/AD8

RD1/AD9

RD2/AD10

RD3/AD11

RD4/AD12

RD5/AD13

RD6/AD14

RD7/AD15

MCLR/V

RE0/ALE

RE1/OE

RE2/WR

TEST

RA0/INT

RA1/T0CKI

RA2

RA3

RA4/RX/DT

RA5/TX/CK

Related parts for PIC17C42A

PIC17C42A Summary of contents

Page 1

... EPROM Memory Programming Speciﬁcation This document includes the programming speciﬁcations for the following devices: • PIC17C42 • PIC17C43 • PIC17C42A • PIC17CR43 • PIC17CR42 • PIC17C44 1.0 PROGRAMMING THE PIC17CXX The PIC17CXX is programmed using the TABLWT instruction. The table pointer points to the internal EPROM location start ...

Page 2

PIC17CXX The actual programming must be done with V V range (4.75 - 5.25V). DDP V =V range required during programming. DDP DD V min.=minimum operating V spec for the part max.=maximum operating V spec for the ...

Page 3

EPROM Memory Programming Specification 2.1.1 LOADING NEW ADDRESS The program allows new address to be loaded right out of reset. A 16-bit address is presented on ports RB (high byte) and RC (low byte) and the RA1 is pulsed (0 ...

Page 4

PIC17CXX 3.0 PROGRAMMING SPECIFICATIONS FIGURE 3-1: PROGRAMMING ROUTINE FLOWCHART Reset RA2 = 0 RA3 = 0 RA4 = 1 MCLR = 1 B port = 0xE1 (hold for 10 Tcy) Present address on ports RB, RC hold Tcy after RA1 ...

Page 5

EPROM Memory Programming Specification FIGURE 3-2: RECOMMENDED PROGRAMMING ALGORITHM FOR USER EPROM Start Load new address Pulse-count = 0 Set Verify blank Pass Blank check? Yes Load new data Set DDP ...

Page 6

PIC17CXX FIGURE 3-3: RECOMMENDED PROGRAMMING ALGORITHM FOR CONFIGURATION WORDS Start Load new address Pulse-count = 0 Set Verify blank Pass Blank check? Yes Load new data Set Program using 100 s pulse ...

Page 7

EPROM Memory Programming Specification 4.0 CONFIGURATION WORD Conﬁguration bits are mapped into program memory. Each bit is assigned one memory location. In erased condition a bit will read as '1'. To program a bit, the user needs to write to ...

Page 8

... TABLE 4-3: CONFIGURATION WORD PIC17C42 To code protect: • Protect all memory XXXXXXXXX0X0XXXX Program Memory Segment Conﬁguration Word (0xFE00) All memory PIC17C42A To code protect: • Protect all memory 0XXXXXXXX0X0XXXX Program Memory Segment Conﬁguration Word (0xFE00) All memory PIC17CR42 To code protect: • Protect all memory ...

Page 9

... SUM[0x000:0x7FF] + CFGW & 0x005F + 0xFFA0 MC mode SUM[0x000:0x7FF] + CFGW & 0x005F + 0xFFA0 EMC mode SUM[0x000:0x7FF] + CFGW & 0x005F + 0xFFA0 PMC mode SUM_XNOR8[0x000:0x7FF] + CFGW & 0x005F + 0xFFA0 PIC17C42A MP mode SUM[0x000:0x7FF] + CFGW & 0x015F MC mode SUM[0x000:0x7FF] + CFGW & 0x015F EMC mode SUM[0x000:0x7FF] + CFGW & 0x015F PMC mode SUM_XNOR8[0x000:0x7FF] + CFGW & ...

Page 10

PIC17CXX 5.0 AC/DC CHARACTERISTICS TIMING REQUIREMENTS FOR PROGRAM/VERIFY TEST MODE Standard Operating Conditions Operating Temperature: + Operating Voltage: 4. Parameter Sym. Characteristic No. PD1 V Supply voltage during pro- DDP gramming PD2 I Supply current ...

Page 11

EPROM Memory Programming Specification FIGURE 5-1: PROGRAMMING AND VERIFY TIMINGS I P15 1996 Microchip Technology Inc. P17 DS30139I-page 11 ...

Page 12

PIC17CXX FIGURE 5-2: PROGRAMMING AND VERIFY TIMINGS II DS30139I-page 12 1996 Microchip Technology Inc. ...

Page 13

EPROM Memory Programming Specification FIGURE 5-3: PROGRAMMING AND VERIFY TIMINGS III 1996 Microchip Technology Inc. DS30139I-page 13 ...

Page 14

PIC17CXX FIGURE 5-4: POWER-UP/DOWN SEQUENCE FOR PROGRAMMING V DD tvcV2tsH P16 V /MCLR PP TEST RA4 RA2 RA3 RA0 P3 tirV2tsH RB<7:0> trbV2mcH DS30139I-page 14 E1H P18 tmcH2rbI tvpL2vcL P19 1996 Microchip Technology Inc. ...

Page 15

EPROM Memory Programming Specification NOTES: 1996 Microchip Technology Inc. DS30139I-page 15 ...

Page 16

W ORLDWIDE AMERICAS Corporate Ofﬁce Microchip Technology Inc. 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 602 786-7200 Fax: 602 786-7277 Technical Support: 602 786-7627 Web: http://www.microchip.com/ Atlanta Microchip Technology Inc. 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 ...

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