PIC12F683-E/MD MICROCHIP [Microchip Technology], PIC12F683-E/MD Datasheet - Page 96

• Manufacturer Part Number: PIC12F683-E/MD
• Description: 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers with nanoWatt Technology
• Manufacturer: MICROCHIP [Microchip Technology]

PIC12F683
FIGURE 12-8:
TABLE 12-6:
DS41211D-page 94
INTCON
IOC
PIR1
PIE1
Legend: x = unknown, u = unchanged, – = unimplemented read as ‘0’, q = value depends upon condition.
INSTRUCTION FLOW
Name
GIE bit
(INTCON reg.)
INTF flag
(INTCON reg.)
CLKOUT
INT pin
OSC1
Note 1: INTF flag is sampled here (every Q1).
Instruction
Executed
Instruction
Fetched
PC
2: Asynchronous interrupt latency = 3-4 T
3: CLKOUT is available only in INTOSC and RC Oscillator modes.
4: For minimum width of INT pulse, refer to AC specifications in Section 15.0 “Electrical Specifications”.
5: INTF is enabled to be set any time during the Q4-Q1 cycles.
Shaded cells are not used by the interrupt module.
(3)
EEIF
EEIE
Bit 7
is the same whether Inst (PC) is a single cycle or a 2-cycle instruction.
GIE
—
SUMMARY OF REGISTERS ASSOCIATED WITH INTERRUPTS
Q1
Inst (PC – 1)
Inst (PC)
INT PIN INTERRUPT TIMING
(1)
ADIE
Q2
PEIE
ADIF
Bit 6
PC
—
(4)
Q3
CCP1IF
CCP1IE
IOC5
Bit 5
Q4
(5)
T0IE
Q1
Inst (PC + 1)
Inst (PC)
IOC4
INTE
Bit 4
Q2
(1)
—
—
PC + 1
Q3
CY
. Synchronous latency = 3 T
CMIE
GPIE
IOC3
CMIF
Bit 3
Q4
Interrupt Latency
Q1
OSFIF
OSFIE
Dummy Cycle
IOC2
Bit 2
T0IF
Q2
PC + 1
—
Q3
TMR2IF
TMR2IE
INTF
IOC1
Bit 1
Q4
(2)
CY
, where T
Q1
Dummy Cycle
Inst (0004h)
TMR1IE 000- 0000 000- 0000
TMR1IF 000- 0000 000- 0000
GPIF
IOC0
Q2
Bit 0
0004h
CY
= instruction cycle time. Latency
© 2007 Microchip Technology Inc.
Q3
0000 0000 0000 0000
--00 0000 --00 0000
POR, BOR
Q4
Value on
Q1
Inst (0005h)
Q2
Inst (0004h)
0005h
Value on
all other
Q3
Resets
Q4