MPC852TZT100 FREESCALE [Freescale Semiconductor, Inc], MPC852TZT100 Datasheet - Page 53

• Manufacturer Part Number: MPC852TZT100
• Description: Hardware Specifications
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

Freescale Semiconductor
(Output)
RSTRT
RCLK3
(Input)
TENA(RTS3)
RxD3
Notes:
RENA(CD3)
1.
2.
REJECT
(Output)
Transmit clock invert (TCI) bit in GSMR is set.
If RENA is deasserted before TENA, or RENA is not asserted at all during transmit, the CSL bit is set in the
buffer descriptor at the end of the frame transmission.
TCLK3
(Note 2)
(Input)
TxD3
(Input)
0
128
Figure 53. CAM Interface Receive Start Timing Diagram
133
MPC852T PowerQUICC™ Hardware Specifications, Rev. 4
131
Figure 54. CAM Interface REJECT Timing Diagram
Figure 52. Ethernet Transmit Timing Diagram
Start Frame De-
1
128
1
137
121
BIT1
125
132
129
BIT2
136
CPM Electrical Characteristics
134
53