AT43USB355M-AC ATMEL [ATMEL Corporation], AT43USB355M-AC Datasheet - Page 58

• Manufacturer Part Number: AT43USB355M-AC
• Description: Full-speed USB Microcontroller with Embedded Hub, ADC and PWM
• Manufacturer: ATMEL [ATMEL Corporation]

58
AT43USB355
SPI Status Register – SPSR
• Bit 7 – SPIF: SPI Interrupt Flag
When a serial transfer is complete, the SPIF bit is set (one) and an interrupt is generated if
SPIE in SPCR is set (one) and global interrupts are enabled. If SS is an input and is driven low
when the SPI is in master mode, this will also set the SPIF flag. SPIF is cleared by the hard-
ware when executing the corresponding interrupt handling vector. Alternatively, the SPIF bit is
cleared by first reading the SPI status register when SPIF is set (one), then accessing the SPI
Data Register (SPDR).
• Bit 6 – WCOL: Write Collision Flag
The WCOL bit is set if the SPI data register (SPDR) is written during a data transfer. The
WCOL bit (and the SPIF bit) are cleared (zero) by first reading the SPI Status Register when
WCOL is set (one), and then accessing the SPI Data Register.
• Bit 5..0 – Res: Reserved Bits
These bits are reserved bits in the AT43USB355 and will always read as zero.
SPI Data Register – SPDR
The SPI Data Register is a read/write register used for data transfer between the register file
and the SPI Shift register. Writing to the register initiates data transmission. Reading the regis-
ter causes the Shift Register Receive buffer to be read.
Initial Value
Read/Write
Initial Value
Read/Write
$0E ($2E)
$0F ($2F)
Bit
Bit
SPIF
MSB
R/W
R
7
0
7
x
WCOL
R/W
6
–
x
R
6
0
R/W
5
–
x
R
5
–
0
R/W
4
–
x
R
4
–
0
R/W
3
–
x
R
3
–
0
R/W
2
–
x
R
2
–
0
R/W
1
–
x
R
1
–
0
LSB
R/W
0
x
2603G–USB–04/06
R
0
–
0
SPDR
Undefined
SPSR