MK61FN1M0VMJ12 FREESCALE [Freescale Semiconductor, Inc], MK61FN1M0VMJ12 Datasheet - Page 14

• Manufacturer Part Number: MK61FN1M0VMJ12
• Description: K61 Sub-Family
• Manufacturer: FREESCALE [Freescale Semiconductor, Inc]

General
1. All 5 V tolerant digital I/O pins are internally clamped to V
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to V
5.2.2 LVD and POR operating requirements
14
Symbol
V
V
V
V
V
Symbol
V
V
V
to V
the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection current
limiting resistor is calculated as R=(V
(=V
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(V
calculated as R=(V
V
I
LVW1H
LVW2H
LVW3H
LVW4H
I
V
RFVBAT
HYSH
ICcont
LVDH
ICAIO
LVDL
POR
RAM
SS
DD
-0.3V) and V
. If V
Falling VDD POR detect voltage
Falling low-voltage detect threshold — high
range (LVDV=01)
Low-voltage warning thresholds — high range
Low-voltage inhibit reset/recover hysteresis —
high range
Falling low-voltage detect threshold — low range
(LVDV=00)
Description
Analog
injection current — single pin
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
V
V
IN
Description
DD
BAT
Table 1. Voltage and current operating requirements (continued)
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
greater than V
• V
• V
• Negative current injection
• Positive current injection
(V
voltage required to retain the VBAT register file
DD_INT
2
IN
IN
IN
, EXTAL0/XTAL0, and EXTAL1/XTAL1 pin DC
IN
< V
> V
-V
is less than V
AIO_MAX
) voltage required to retain RAM
SS
DD
Table 2. LVD and POR operating requirements
-0.3V (Negative current injection)
+0.3V (Positive current injection)
DIO_MIN
)/|I
IC
K61 Sub-Family Data Sheet, Rev. 4, 10/2012.
AIO_MAX
|. Select the larger of these two calculated resistances.
(=V
DIO_MIN
SS
-0.3V) is observed, then there is no need to provide current limiting resistors at
Table continues on the next page...
(=V
SS
-V
and V
DD
IN
+0.3V) is observed, then there is no need to provide current limiting
)/|I
IC
DD
|.
AIO_MIN
through ESD protection diodes. If V
SS
through a ESD protection diode. There is no diode connection
-V
IN
2.48
2.62
2.72
2.82
2.92
1.54
Min.
0.8
)/|I
—
IC
V
|. The positive injection current limiting resistor is
POR_VBAT
Min.
-25
1.2
-5
—
—
2.56
2.70
2.80
2.90
3.00
1.60
Typ.
±80
1.1
Max.
+25
+5
—
—
—
—
Max.
2.64
2.78
2.88
2.98
3.08
1.66
IN
1.5
—
is greater than V
Freescale Semiconductor, Inc.
Unit
mA
mA
V
V
Unit
mV
V
V
V
V
V
V
V
AIO_MIN
Notes
Notes
3
1