MK61FN1M0VMD12 FREESCALE [Freescale Semiconductor, Inc], MK61FN1M0VMD12 Datasheet - Page 62
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MK61FN1M0VMD12
Manufacturer Part Number
MK61FN1M0VMD12
Description
K61 Sub-Family Data Sheet
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet
1.MK61FN1M0VMD12.pdf
(82 pages)
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Peripheral operating requirements and behaviors
6.8.1.2 RMII signal switching specifications
The following timing specs meet the requirements for RMII style interfaces for a range of
transceiver devices.
6.8.2 USB electrical specifications
The USB electricals for the USB On-the-Go module conform to the standards
documented by the Universal Serial Bus Implementers Forum. For the most up-to-date
standards, visit http://www.usb.org.
62
RMII1
RMII2
RMII3
RMII4
RMII7
RMII8
Num
—
EXTAL frequency (RMII input clock RMII_CLK)
RMII_CLK pulse width high
RMII_CLK pulse width low
RXD[1:0], CRS_DV, RXER to RMII_CLK setup
RMII_CLK to RXD[1:0], CRS_DV, RXER hold
RMII_CLK to TXD[1:0], TXEN invalid
RMII_CLK to TXD[1:0], TXEN valid
Description
RXCLK (input)
RXD[n:0]
RXDV
RXER
Table 40. RMII signal switching specifications
K61 Sub-Family Data Sheet Data Sheet, Rev. 3, 2/2012.
Figure 26. MII receive signal timing diagram
Preliminary
MII2
MII3
Valid data
Valid data
Valid data
MII1
MII4
35%
35%
Min.
—
—
4
2
4
Freescale Semiconductor, Inc.
Max.
65%
65%
50
15
—
—
—
RMII_CLK
RMII_CLK
period
period
MHz
Unit
ns
ns
ns
ns
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