EPF10K100E ALTERA [Altera Corporation], EPF10K100E Datasheet
EPF10K100E
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EPF10K100E Summary of contents
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January 2003, ver. 2.5 Features... f Table 1. FLEX 10KE Device Features Feature Typical gates (1) Maximum system gates Logic elements (LEs) EABs Total RAM bits Maximum user I/O pins Altera Corporation DS-F10KE-2.5 ® Embedded programmable logic devices (PLDs), providing ...
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... EABs Total RAM bits Maximum user I/O pins Note to tables: (1) The embedded IEEE Std. 1149.1 JTAG circuitry adds up to 31,250 gates in addition to the listed typical or maximum system gates. (2) New EPF10K100B designs should use EPF10K100E devices. ...and More Features 2 EPF10K100E (2) 100,000 257,000 4,992 ...
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... EPF10K50E 102 147 EPF10K50S 102 147 EPF10K100E 147 EPF10K130E EPF10K200E EPF10K200S Notes: (1) FLEX 10KE device package types include thin quad flat pack (TQFP), plastic quad flat pack (PQFP), power quad flat pack (RQFP), pin-grid array (PGA), and ball-grid array (BGA) packages. ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 4. FLEX 10KE Package Sizes Device 144- 208-Pin Pin PQFP TQFP Pitch (mm) 0.50 0.50 2 Area (mm ) 484 936 Length width 22 22 30.6 (mm mm) General Altera FLEX ...
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Table 5. FLEX 10KE Performance Application 16-bit loadable counter 16-bit accumulator 16-to-1 multiplexer (1) 16-bit multiplier with 3-stage pipeline (2) 256 16 RAM read cycle speed (2) 256 16 RAM write cycle speed (2) Notes: (1) This application uses combinatorial ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Similar to the FLEX 10KE architecture, embedded gate arrays are the fastest-growing segment of the gate array market. As with standard gate arrays, embedded gate arrays implement general logic in a conventional ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet For more information on FLEX device configuration, see the following documents: Configuration Devices for APEX & FLEX Devices Data Sheet BitBlaster Serial Download Cable Data Sheet ByteBlasterMV Parallel ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Functional Each FLEX 10KE device contains an enhanced embedded array to implement memory and specialized logic functions, and a logic array to Description implement general logic. The embedded array consists of a ...
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Figure 1. FLEX 10KE Device Block Diagram I/O Element IOE IOE (IOE) IOE IOE Column Interconnect IOE IOE Row Interconnect Logic Array IOE IOE Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 1 shows a block diagram ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Embedded Array Block The EAB is a flexible block of RAM, with registers on the input and output ports, that is used to implement common gate array megafunctions. Because it is large ...
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... All registers can be asynchronously cleared by EAB local interconnect signals, global signals, or the chip-wide reset. (2) EPF10K30E and EPF10K50E devices have 88 EAB local interconnect channels; EPF10K100E, EPF10K130E, and EPF10K200E devices have 104 EAB local interconnect channels. Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet The EAB can also be used for bidirectional, dual-port memory applications where two ports read or write simultaneously ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet The EAB can also use Altera megafunctions to implement dual-port RAM applications where both ports can read or write, as shown in Figure 3. FLEX 10KE EAB in Dual-Port RAM Mode The ...
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... Clocks 2 EAB Local Interconnect (1) Note: (1) EPF10K30E, EPF10K50E, and EPF10K50S devices have 88 EAB local interconnect channels; EPF10K100E, EPF10K130E, EPF10K200E, and EPF10K200S devices have 104 EAB local interconnect channels. Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Chip-Wide Row Interconnect Reset ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet When used as RAM, each EAB can be configured in any of the following sizes: 256 16, 512 8, 1,024 4, or 2,048 Figure 5. FLEX 10KE EAB Memory Configurations Larger blocks ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet EABs provide flexible options for driving and controlling clock signals. Different clocks and clock enables can be used for reading and writing to the EAB. Registers can be independently inserted ...
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... EPF10K30E, EPF10K50E, and EPF10K50S devices have 22 inputs to the LAB local interconnect channel from the row; EPF10K100E, EPF10K130E, EPF10K200E, and EPF10K200S devices have 26. (2) EPF10K30E, EPF10K50E, and EPF10K50S devices have 30 LAB local interconnect channels; EPF10K100E, EPF10K130E, EPF10K200E, and EPF10K200S devices have 34. 16 Dedicated Inputs & ...
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Figure 8. FLEX 10KE Logic Element data1 Look-Up data2 data3 data4 labctrl1 labctrl2 Chip-Wide Reset labctrl3 labctrl4 Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Each LAB provides four control signals with programmable inversion that can be used ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet The programmable flipflop in the LE can be configured for operation. The clock, clear, and preset control signals on the flipflop can be driven by global signals, ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 9 shows how an n-bit full adder can be implemented LEs with the carry chain. One portion of the LUT generates the sum of two ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Cascade Chain With the cascade chain, the FLEX 10KE architecture can implement functions that have a very wide fan-in. Adjacent LUTs can be used to compute portions of the function in parallel; ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet LE Operating Modes The FLEX 10KE LE can operate in the following four modes: Normal mode Arithmetic mode Up/down counter mode Clearable counter mode Each of these modes uses LE ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 11 Figure 11. FLEX 10KE LE Operating Modes Normal Mode Carry-In data1 data2 data3 data4 Arithmetic Mode Carry-In data1 3-Input data2 3-Input Up/Down Counter Mode Carry-In data1 (ena) data2 (u/d) data3 ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Normal Mode The normal mode is suitable for general logic applications and wide decoding functions that can take advantage of a cascade chain. In normal mode, four data inputs from ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Clearable Counter Mode The clearable counter mode is similar to the up/down counter mode, but supports a synchronous clear instead of the up/down control. The clear function is substituted for the cascade-in ...
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Figure 12. FLEX 10KE LE Clear & Preset Modes Asynchronous Clear VCC PRN D Q CLRN labctrl1 or labctrl2 Chip-Wide Reset Asynchronous Load with Clear NOT labctrl1 (Asynchronous Load) data3 (Data) NOT labctrl2 (Clear) Chip-Wide Reset Asynchronous Load with Preset ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Asynchronous Clear The flipflop can be cleared by either LABCTRL1 or LABCTRL2. In this mode, the preset signal is tied to VCC to deactivate it. Asynchronous Preset An asynchronous preset is implemented ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet FastTrack Interconnect Routing Structure In the FLEX 10KE architecture, connections between LEs, EABs, and device I/O pins are provided by the FastTrack Interconnect routing structure, which is a series of ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 13. FLEX 10KE LAB Connections to Row & Column Interconnect Row Channels Each LE can drive two row channels each intersection, six row ...
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... FLEX 10KE device. Table 7. FLEX 10KE FastTrack Interconnect Resources Device Rows EPF10K30E 6 EPF10K50E 10 EPF10K50S EPF10K100E 12 EPF10K130E 16 EPF10K200E 24 EPF10K200S In addition to general-purpose I/O pins, FLEX 10KE devices have six dedicated input pins that provide low-skew signal distribution across the device. These six inputs can be used for global clock, clear, preset, and peripheral output enable and clock enable control signals ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 14. FLEX 10KE Interconnect Resources I/O Element (IOE) IOE IOE Row LAB Interconnect A1 Column Interconnect IOE IOE LAB B1 I/O Element An IOE contains a bidirectional I/O buffer and a ...
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Figure 15. FLEX 10KE Bidirectional I/O Registers Row and Column 2 Dedicated Interconnect Clock Inputs Peripheral 4 Dedicated Control Bus Inputs 2 4 Note: (1) All FLEX 10KE devices (except the EPF10K50E and EPF10K200E devices) have a programmable input delay ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet On all FLEX 10KE devices (except EPF10K50E and EPF10K200E devices), the input path from the I/O pad to the FastTrack Interconnect has a programmable delay element that can be used to guarantee ...
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Table 8. Peripheral Bus Sources for EPF10K30E, EPF10K50E & EPF10K50S Devices Peripheral Control Signal OE0 OE1 OE2 OE3 OE4 OE5 CLKENA0/CLK0/GLOBAL0 CLKENA1/OE6/GLOBAL1 CLKENA2/CLR0 CLKENA3/OE7/GLOBAL2 CLKENA4/CLR1 CLKENA5/CLK1/GLOBAL3 Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet When dedicated inputs drive ...
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... FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 9. Peripheral Bus Sources for EPF10K100E, EPF10K130E, EPF10K200E & EPF10K200S Devices Peripheral Control Signal OE0 OE1 OE2 OE3 OE4 OE5 CLKENA0/CLK0/GLOBAL0 CLKENA1/OE6/GLOBAL1 CLKENA2/CLR0 CLKENA3/OE7/GLOBAL2 CLKENA4/CLR1 CLKENA5/CLK1/GLOBAL3 Signals on the peripheral control bus can also drive the four global signals, ...
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... Each IOE can drive two row channels. Table 10 lists the FLEX 10KE row-to-IOE interconnect resources. Table 10. FLEX 10KE Row-to-IOE Interconnect Resources Device Channels per Row (n) EPF10K30E EPF10K50E EPF10K50S EPF10K100E EPF10K130E EPF10K200E EPF10K200S 16). Table 10. IOE1 m IOE8 m Each IOE is driven by an m-to-1 multiplexer ...
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... Each IOE can drive two column channels. lists the FLEX 10KE column-to-IOE interconnect resources. Table 11. FLEX 10KE Column-to-IOE Interconnect Resources Device Channels per Column (n) Column Channels per Pin (m) EPF10K30E EPF10K50E EPF10K50S EPF10K100E EPF10K130E EPF10K200E EPF10K200S Table 11. Each IOE is driven by a m-to-1 multiplexer IOE1 ...
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SameFrame Pin-Outs Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet FLEX 10KE devices support the SameFrame pin-out feature for FineLine BGA packages. The SameFrame pin-out feature is the arrangement of balls on FineLine BGA packages such that the ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet ClockLock & To support high-speed designs, FLEX 10KE devices offer optional ClockLock and ClockBoost circuitry containing a phase-locked loop (PLL) ClockBoost used to increase design speed and reduce resource usage. The ClockLock ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet ClockLock & ClockBoost Timing Parameters For the ClockLock and ClockBoost circuitry to function properly, the incoming clock must meet certain requirements. If these specifications are not met, the circuitry may ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Tables 12 for -1 and -2 speed-grade devices, respectively. Table 12. ClockLock & ClockBoost Parameters for -1 Speed-Grade Devices Symbol Parameter t Input rise time R t Input fall time F t ...
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Table 13. ClockLock & ClockBoost Parameters for -2 Speed-Grade Devices Symbol Parameter t Input rise time R t Input fall time F t Input duty cycle INDUTY f Input clock frequency (ClockBoost CLK1 clock multiplication factor equals 1) f Input ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet PCI Pull-Up Clamping Diode Option FLEX 10KE devices have a pull-up clamping diode on every I/O, dedicated input, and dedicated clock pin. PCI clamping diodes clamp the signal to the V Clamping ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet The VCCINT pins must always be connected to a 2.5-V power supply. With a 2.5-V V level, input voltages are compatible with 2.5-V, 3.3- CCINT V, and 5.0-V inputs. The ...
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... IDCODE information for FLEX 10KE devices. 44 Table 16. FLEX 10KE Boundary-Scan Register Length Device EPF10K30E EPF10K50E EPF10K50S EPF10K100E EPF10K130E EPF10K200E EPF10K200S TM STAPL Description Boundary-Scan Register Length 690 798 ...
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... Table 17. 32-Bit IDCODE for FLEX 10KE Devices Device Version Part Number (16 Bits) (4 Bits) EPF10K30E 0001 0001 0000 0011 0000 EPF10K50E 0001 0001 0000 0101 0000 EPF10K50S EPF10K100E 0010 0000 0001 0000 0000 EPF10K130E 0001 0000 0001 0011 0000 EPF10K200E 0001 0000 0010 0000 0000 EPF10K200S Notes: (1) The most significant bit (MSB the left ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 20 Figure 20. FLEX 10KE JTAG Waveforms Table 18 46 shows the timing requirements for the JTAG signals. TMS TDI t JCP t t JCH JCL TCK t JPZX TDO t ...
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Generic Testing Operating Conditions Table 19. FLEX 10KE 2.5-V Device Absolute Maximum Ratings Symbol Parameter V Supply voltage CCINT V CCIO V DC input voltage output current, per pin OUT T Storage temperature STG T Ambient temperature ...
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... Ambient temperature A T Operating temperature J t Input rise time R t Input fall time F Table 21. 2.5-V EPF10K30E, EPF10K50S, EPF10K100E, EPF10K130E & EPF10K200S Device Recommended Operating Conditions Symbol Parameter V Supply voltage for internal logic CCINT and input buffers V Supply voltage for output buffers, CCIO 3 ...
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Table 22. FLEX 10KE 2.5-V Device DC Operating Conditions Symbol Parameter V High-level input IH voltage V Low-level input IL voltage V 3.3-V high-level TTL OH output voltage 3.3-V high-level CMOS output voltage 3.3-V high-level PCI output voltage 2.5-V high-level ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 23. FLEX 10KE Device Capacitance Symbol Parameter C Input capacitance IN C Input capacitance on INCLK dedicated clock pin C Output capacitance OUT Notes to tables: (1) See the Operating Requirements ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 22 shows the required relationship between V 3.3-V PCI compliance. Figure 22. Relationship between V 2.7 V (V) CCINT II 2.5 2.3 3.0 Figure 23 shows the typical output ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 23. Output Drive Characteristics of FLEX 10KE Devices Typical Output Current (mA Note: (1) These are transient (AC) currents. ...
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Figure 24. FLEX 10KE Device Timing Model Dedicated Clock/Input Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet Timing simulation and delay prediction are available with the Altera Simulator and Timing Analyzer, or with industry-standard EDA tools. The Simulator ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 25. FLEX 10KE Device LE Timing Model Carry-In Data-In Control-In 54 Cascade-In LUT Delay t LUT t RLUT t CLUT Packed Register Delay t PACKED Register Control Delay ...
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Figure 26. FLEX 10KE Device IOE Timing Model Data-In Clock Enable Clear Clock Output Enable Feedback Delay Data Feedback into FastTrack Interconnect Figure 27. FLEX 10KE Device EAB Timing Model EAB Data Input Delays Data-In t EABDATA1 t Address EABDATA2 ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 28. Synchronous Bidirectional Pin External Timing Model Tables 24 parameters. parameters and their symbols. Table 24. LE Timing Microparameters (Part Symbol t LUT delay for data-in LUT t ...
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Table 24. LE Timing Microparameters (Part Symbol t LE register clear delay CLR t Minimum clock high time from clock pin CH t Minimum clock low time from clock pin CL Table 25. IOE Timing Microparameters Symbol ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 26. EAB Timing Microparameters Symbol t Data or address delay to EAB for combinatorial input EABDATA1 t Data or address delay to EAB for registered input EABDATA2 t Write enable delay ...
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Table 27. EAB Timing Macroparameters Symbol t EAB address access delay EABAA t EAB asynchronous read cycle time EABRCCOMB t EAB synchronous read cycle time EABRCREG t EAB write pulse width EABWP t EAB asynchronous write cycle time EABWCCOMB t ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 28. Interconnect Timing Microparameters Symbol t Delay from dedicated input pin to IOE control input DIN2IOE t Delay from dedicated input pin EAB control input DIN2LE t Delay ...
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... Operating conditions: VCCIO = 3.3 V ±10% for commercial or industrial use. (3) Operating conditions: VCCIO = 2.5 V ±5% for commercial or industrial use in EPF10K30E, EPF10K50S, EPF10K100E, EPF10K130E, and EPF10K200S devices. (4) Operating conditions: VCCIO = 3.3 V. (5) Because the RAM in the EAB is self-timed, this parameter can be ignored when the WE signal is registered. ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figures 29 waveforms, respectively, or the EAB macroparameters in and 27. Figure 29. EAB Asynchronous Timing Waveforms EAB Asynchronous Read WE Address a0 Data-Out d0 EAB Asynchronous Write WE Data-In t EABWASU ...
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Figure 30. EAB Synchronous Timing Waveforms EAB Synchronous Read WE Address a0 t EABDATASU CLK Data-Out EAB Synchronous Write (EAB Output Registers Used) WE din1 Data- Address t EABWESU CLK Data-Out Table 31. EPF10K30E Device LE Timing Microparameters ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 31. EPF10K30E Device LE Timing Microparameters (Part Symbol -1 Speed Grade Min t CGENR t CASC COMB t 0 0.7 H ...
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Table 33. EPF10K30E Device EAB Internal Microparameters Symbol -1 Speed Grade Min t EABDATA1 t EABDATA1 t EABWE1 t EABWE2 t EABRE1 t EABRE2 t EABCLK t EABCO t EABBYPASS t 0.9 EABSU t 0.4 EABH t 0.3 EABCLR t ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 34. EPF10K30E Device EAB Internal Timing Macroparameters Symbol -1 Speed Grade Min t EABAA t 6.4 EABRCOMB t 4.4 EABRCREG t 2.5 EABWP t 6.0 EABWCOMB t 6.8 EABWCREG t EABDD ...
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Table 35. EPF10K30E Device Interconnect Timing Microparameters Symbol -1 Speed Grade Min t DIN2IOE t DIN2LE t DIN2DATA t DCLK2IOE t DCLK2LE t SAMELAB t SAMEROW t SAMECOLUMN t DIFFROW t TWOROWS t LEPERIPH t LABCARRY t LABCASC Table 36. ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 37. EPF10K30E External Bidirectional Timing Parameters Symbol -1 Speed Grade Min t (3) 2.8 INSUBIDIR t (3) 0.0 INHBIDIR t (4) 3.8 INSUBIDIR t (4) 0.0 INHBIDIR t (3) 2.0 OUTCOBIDIR ...
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Table 38. EPF10K50E Device LE Timing Microparameters (Part Symbol -1 Speed Grade Min t 0 PRE t CLR t 2 2.0 CL Table 39. EPF10K50E Device IOE Timing Microparameters Symbol -1 Speed Grade ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 40. EPF10K50E Device EAB Internal Microparameters Symbol -1 Speed Grade Min t EABDATA1 t EABDATA1 t EABWE1 t EABWE2 t EABRE1 t EABRE2 t EABCLK t EABCO t EABBYPASS t 0.9 ...
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Table 41. EPF10K50E Device EAB Internal Timing Macroparameters Symbol -1 Speed Grade Min t EABAA t 6.4 EABRCOMB t 4.4 EABRCREG t 2.5 EABWP t 6.0 EABWCOMB t 6.8 EABWCREG t EABDD t EABDATACO t 1.5 EABDATASU t 0.0 EABDATAH ...
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... Min t 2.7 INSUBIDIR t 0.0 INHBIDIR t 2.0 OUTCOBIDIR t XZBIDIR t ZXBIDIR Notes to tables: (1) All timing parameters are described in (2) These parameters are specified by characterization. Tables 45 timing parameters. Table 45. EPF10K100E Device LE Timing Microparameters Symbol -1 Speed Grade Min t LUT t CLUT t RLUT t PACKED CICO t CGEN 72 Notes (1), -2 Speed Grade ...
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... Table 45. EPF10K100E Device LE Timing Microparameters Symbol -1 Speed Grade Min t CGENR t CASC COMB PRE t CLR t 1 1.5 CL Table 46. EPF10K100E Device IOE Timing Microparameters Symbol -1 Speed Grade Min t IOD t IOC t IOCO t IOCOMB t 0.8 IOSU t 0.7 IOH t IOCLR t OD1 t OD2 t OD3 ZX1 ...
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... EABBYPASS t 0.8 EABSU t 0.1 EABH t 0.3 EABCLR 2 1 1.0 WDSU t 0.2 WDH t 1.6 WASU t 1.6 WAH t 3.0 RASU t 0.1 RAH EABOUT t 1.5 EABCH t 2.7 EABCL Table 48. EPF10K100E Device EAB Internal Timing Macroparameters (Part Symbol -1 Speed Grade Min t EABAA t 5.9 EABRCOMB t 5.1 EABRCREG t 2.7 EABWP 74 -2 Speed Grade Max Min Max 1.5 2.0 0.0 0.0 1.5 2.0 0.3 0.4 0.3 0.4 0.0 0.0 0.0 0.0 0.3 0.4 0.1 0.1 1.0 0.1 0.4 4.0 5.1 3.5 1.3 1.3 0.2 2.1 2 ...
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... Table 48. EPF10K100E Device EAB Internal Timing Macroparameters (Part Symbol -1 Speed Grade Min t 5.9 EABWCOMB t 5.4 EABWCREG t EABDD t EABDATACO t 0.8 EABDATASU t 0.1 EABDATAH t 1.1 EABWESU t 0.0 EABWEH t 1.0 EABWDSU t 0.2 EABWDH t 4.1 EABWASU t 0.0 EABWAH t EABWO Table 49. EPF10K100E Device Interconnect Timing Microparameters Symbol -1 Speed Grade Min t DIN2IOE t DIN2LE t DIN2DATA t DCLK2IOE t DCLK2LE ...
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... INSU t (3) 0.0 INH t (3) 2.0 OUTCO t (4) 2.0 INSU t (4) 0.0 INH t (4) 0.5 OUTCO t 3.0 PCISU t 0.0 PCIH t 2.0 PCICO Table 51. EPF10K100E External Bidirectional Timing Parameters Symbol -1 Speed Grade Min t (3) 1.7 INSUBIDIR t (3) 0.0 INHBIDIR t (4) 2.0 INSUBIDIR t (4) 0.0 INHBIDIR t (3) 2.0 OUTCOBIDIR t (3) XZBIDIR t (3) ZXBIDIR t (4) 0.5 OUTCOBIDIR ...
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Table 52. EPF10K130E Device LE Timing Microparameters Symbol -1 Speed Grade Min t LUT t CLUT t RLUT t PACKED CICO t CGEN t CGENR t CASC COMB t 0 ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 53. EPF10K130E Device IOE Timing Microparameters Symbol -1 Speed Grade Min t OD3 ZX1 t ZX2 t ZX3 t INREG t IOFD t INCOMB Table 54. EPF10K130E Device ...
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Table 54. EPF10K130E Device EAB Internal Microparameters (Part Symbol -1 Speed Grade Min EABOUT t 1.5 EABCH t 2.7 EABCL Table 55. EPF10K130E Device EAB Internal Timing Macroparameters Symbol -1 Speed Grade Min t ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 56. EPF10K130E Device Interconnect Timing Microparameters Symbol -1 Speed Grade Min t DIN2IOE t DIN2LE t DIN2DATA t DCLK2IOE t DCLK2LE t SAMELAB t SAMEROW t SAMECOLUMN t DIFFROW t TWOROWS ...
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Table 58. EPF10K130E External Bidirectional Timing Parameters Symbol -1 Speed Grade Min t (3) 2.2 INSUBIDIR t (3) 0.0 INHBIDIR t (4) 2.8 INSUBIDIR t (4) 0.0 INHBIDIR t (3) 2.0 OUTCOBIDIR t (3) XZBIDIR t (3) ZXBIDIR t (4) ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 59. EPF10K200E Device LE Timing Microparameters (Part Symbol -1 Speed Grade Min t 0 PRE t CLR t 2 2.0 CL Table 60. EPF10K200E ...
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Table 61. EPF10K200E Device EAB Internal Microparameters Symbol -1 Speed Grade Min t EABDATA1 t EABDATA1 t EABWE1 t EABWE2 t EABRE1 t EABRE2 t EABCLK t EABCO t EABBYPASS t 0.9 EABSU t 0.4 EABH t 0.8 EABCLR t ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 62. EPF10K200E Device EAB Internal Timing Macroparameters (Part Symbol -1 Speed Grade Min t 6.7 EABWCOMB t 6.6 EABWCREG t EABDD t EABDATACO t 1.3 EABDATASU t 0.0 ...
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Table 64. EPF10K200E External Timing Parameters Symbol -1 Speed Grade Min t DRR t 2.8 INSU t 0.0 INH t 2.0 OUTCO t 3.0 PCISU t 0.0 PCIH t 2.0 PCICO Table 65. EPF10K200E External Bidirectional Timing Parameters Symbol -1 ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 66. EPF10K50S Device LE Timing Microparameters (Part Symbol -1 Speed Grade Min t CGENR t CASC COMB t 0 0.5 H ...
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Table 68. EPF10K50S Device EAB Internal Microparameters Symbol -1 Speed Grade Min t EABDATA1 t EABDATA2 t EABWE1 t EABWE2 t EABRE1 t EABRE2 t EABCLK t EABCO t EABBYPASS t 0.7 EABSU t 0.4 EABH t 0.8 EABCLR t ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 69. EPF10K50S Device EAB Internal Timing Macroparameters Symbol -1 Speed Grade Min t EABAA t 3.7 EABRCCOMB t 3.5 EABRCREG t 2.0 EABWP t 4.5 EABWCCOMB t 5.6 EABWCREG t EABDD ...
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Table 71. EPF10K50S External Timing Parameters Symbol -1 Speed Grade Min t DRR t (2) 2.4 INSU t (2) 0.0 INH t (2) 2.0 OUTCO t (3) 2.4 INSU t (3) 0.0 INH t (3) 0.5 OUTCO t 2.4 PCISU ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 73. EPF10K200S Device Internal & External Timing Parameters Symbol -1 Speed Grade Min t LUT t CLUT t RLUT t PACKED CICO t CGEN t CGENR t CASC ...
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Table 74. EPF10K200S Device IOE Timing Microparameters (Part Symbol -1 Speed Grade Min t ZX2 t ZX3 t INREG t IOFD t INCOMB Table 75. EPF10K200S Device EAB Internal Microparameters Symbol -1 Speed Grade Min t EABDATA1 ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Table 76. EPF10K200S Device EAB Internal Timing Macroparameters Symbol -1 Speed Grade Min t EABAA t 3.9 EABRCOMB t 3.6 EABRCREG t 2.1 EABWP t 4.8 EABWCOMB t 5.4 EABWCREG t EABDD ...
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Table 77. EPF10K200S Device Interconnect Timing Microparameters (Part Symbol -1 Speed Grade Min t LABCASC Table 78. EPF10K200S External Timing Parameters Symbol -1 Speed Grade Min t DRR t (2) 3.1 INSU t (2) 0.0 INH t ...
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... Total number of LEs used in the device = Average percent of LEs toggling at each clock LC (typically 12.5%) = Constant provides the constant (K) values for FLEX 10KE devices. Table 80. FLEX 10KE K Constant Values Device EPF10K30E EPF10K50E EPF10K50S EPF10K100E EPF10K130E EPF10K200E EPF10K200S + CCACTIVE ) CC IO value, which depends on the IO Application Note 74 (Evaluating ...
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... FPGAs. Figure 31 shows the relationship between the current and operating frequency of FLEX 10KE devices. vs. Operating Frequency (Part EPF10K50E I CC Current (mA) 100 50 Frequency (MHz) EPF10K100E I CC Current (mA) 100 50 200 150 Supply 100 ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Figure 31. FLEX 10KE I CCACTIVE EPF10K130E 400 300 Supply I CC Current (mA) 200 100 0 Configuration & The FLEX 10KE architecture supports several configuration schemes. This section summarizes the device ...
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Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet During initialization, which occurs immediately after configuration, the device resets registers, enables I/O pins, and begins to operate as a logic device. The I/O pins are tri-stated during power-up, and ...
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... Parallel data source Parallel data source BitBlaster or ByteBlasterMV download cables, or microprocessor with a Jam STAPL file or JBC file FLEX 10KE Device EPF10K30EF256 EPF10K30EF484 EPF10K50SB356 EPF10K50EF484 EPF10K50SF484 EPF10K100EF484 Table 82), chosen on the basis of the target Data Source Altera Corporation I/O Count 176 220 220 254 254 ...
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Device Pin-Outs Revision History Altera Corporation FLEX 10KE Embedded Programmable Logic Devices Data Sheet See the Altera web site (http://www.altera.com) or the Altera Digital Library for pin-out information. The information contained in the FLEX 10KE Embedded Programmable Logic Data Sheet ...
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FLEX 10KE Embedded Programmable Logic Devices Data Sheet Copyright © 2003 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other words and logos that are identified as trademarks and/or ...