ADSP-21362WBBCZ-1A AD [Analog Devices], ADSP-21362WBBCZ-1A Datasheet - Page 22
ADSP-21362WBBCZ-1A
Manufacturer Part Number
ADSP-21362WBBCZ-1A
Description
SHARC Processor
Manufacturer
AD [Analog Devices]
Datasheet
1.ADSP-21362WBBCZ-1A.pdf
(52 pages)
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ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
Core Timer
The following timing specification applies to FLAG3 when it is
configured as the core timer (CTIMER).
Table 16. Core Timer
Timer PWM_OUT Cycle Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in PWM_OUT (pulse-width modulation) mode.
Timer signals are routed to the DAI_P20–1 pins through the
SRU. Therefore, the timing specifications provided below are
valid at the DAI_P20–1 pins.
Table 17. Timer PWM_OUT Timing
Parameter
Switching Characteristic
t
Parameter
Switching Characteristic
t
WCTIM
PWMO
(CTIMER)
FLAG3
Timer Pulse Width Output
CTIMER Pulse Width
(TIMER2
DAI_P20
-
-
0)
1
Rev. A | Page 22 of 52 | December 2006
Figure 13. Timer PWM_OUT Timing
Figure 12. Core Timer
Min
2 t
PCLK
Min
2 × t
– 1
PCLK
– 1
t
PWM O
t
WCTIM
Max
2(2
31
– 1) t
Max
PCLK
Unit
ns
Unit
ns
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