XC95144XV-7TQ100C XILINX [Xilinx, Inc], XC95144XV-7TQ100C Datasheet - Page 3

• Manufacturer Part Number: XC95144XV-7TQ100C
• Description: High-Performance CPLD
• Manufacturer: XILINX [Xilinx, Inc]

Supported I/O Standards
Table 1: IOSTANDARD Options
DS051 (v3.0) June 25, 2007
Product Specification
LVTTL
LVCMOS2
X25TO18
IOSTANDARD
JTAG Port
R
I/O/GCK
I/O/GSR
I/O/GTS
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Function Block outputs (indicated by the bold line) drive the I/O Blocks directly.
V
3.3V
2.5V
1.8V
CCIO
4
3
1
1
3
Figure 2: XC95144XV Architecture
Controller
Blocks
JTAG
I/O
www.xilinx.com
The XC95144XV CPLD features both LVCMOS and LVTTL
I/O implementations. See
The LVTTL I/O standard is a general purpose EIA/JEDEC
standard for 3.3V applications that use an LVTTL input
buffer and Push-Pull output buffer. The LVCMOS2 standard
is used in 2.5V applications.
XC9500XV CPLDs are also 1.8V I/O compatible. The
X25TO18 setting is provided for generating 1.8V compatible
outputs from a CPLD normally operating in a 2.5V environ-
In-System Programming Controller
18
18
18
18
18
XC95144XV High-Performance CPLD
54
54
54
54
54
Table 1
Macrocells
Macrocells
Macrocells
Macrocells
Macrocells
for I/O standard voltages.
Function
Function
Function
Function
Function
Block 1
Block 2
Block 3
Block 4
Block 8
1 to 18
1 to 18
1 to 18
1 to 18
1 to 18
DS051_02_041000
3