ATF2500C_08 ATMEL [ATMEL Corporation], ATF2500C_08 Datasheet

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ATF2500C_08

Manufacturer Part Number
ATF2500C_08
Description
ATF2500C CPLD Family Datasheet
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
1. Description
The ATF2500C is the highest-density PLD available in a 44-pin surface mount pack-
age. With its fully connected logic array and flexible macrocell structure, high gate
utilization is easily obtainable. The ATF2500C is a high-performance CMOS (electri-
cally-erasable) programmable logic device (PLD) that utilizes Atmel’s proven
electrically-erasable technology. This PLD is now available in a fully Green or LHF
(lead and halide-free) packages.
Figure 1-1.
High-performance, High-density, Electrically-erasable Programmable Logic Device
Fully Connected Logic Array with 416 Product Terms
15 ns Maximum Pin-to-pin Delay for 5V Operation
24 Flexible Output Macrocells
D- or T-type Flip-flops
Product Term or Direct Input Pin Clocking
Registered or Combinatorial Internal Feedback
Backward Compatible with ATV2500B/BQ and ATV2500H Software
Advanced Electrically-erasable Technology
44-lead Surface Mount Package and 40-pin DIP Package
Flexible Design: Up to 48 Buried Flip-flops and 24 Combinatorial Outputs
Simultaneously
8 Synchronous Product Terms
Individual Asynchronous Reset per Macrocell
OE Control per Macrocell
Functionality Equivalent to ATV2500B/BQ and ATV2500H
2000V ESD Protection
Security Fuse Feature to Protect the Code
Commercial, Industrial and Military Temperature Range Offered
10 Year Data Retention
Pin Keeper Option
200 mA Latch-up Immunity
Green Package Options (Pb/Halide-free/RoHS Compliant) Available
– 48 Flip-flops – Two per Macrocell
– 72 Sum Terms
– All Flip-flops, I/O Pins Feed in Independently
– Reprogrammable
– 100% Tested
Block Diagram
ATF2500C
CPLD Family
Datasheet
ATF2500C
0777K–PLD–1/24/08

Related parts for ATF2500C_08

ATF2500C_08 Summary of contents

Page 1

Features • High-performance, High-density, Electrically-erasable Programmable Logic Device • Fully Connected Logic Array with 416 Product Terms • Maximum Pin-to-pin Delay for 5V Operation • 24 Flexible Output Macrocells – 48 Flip-flops – Two per Macrocell – 72 ...

Page 2

The ATF2500C is organized around a single universal array. All pins and feedback terms are always available to every macrocell. Each of the 38 logic pins are array inputs, as are the out- puts of each flip-flop. In the ATF2500C, ...

Page 3

Using the ATF2500C Family’s Many Advanced Features The ATF2500Cs advanced flexibility packs more usable gates into 44 leads than other PLDs. Some of the ATF2500Cs key features are: • Fully Connected Logic Array – Each array input is always ...

Page 4

Power-up Reset The registers in the ATF2500Cs are designed to reset during power-up point delayed slightly from V depend on the polarity of the output buffer. This feature is critical for state as nature of reset and ...

Page 5

Preload and Observability of Registered Outputs The ATF2500Cs registers are provided with circuitry to allow loading of each register asynchro- nously with either a high or a low. This feature will simplify testing since any state can be forced ...

Page 6

Software Support All family members of the ATF2500C can be designed with Atmel-WinCUPL. Additionally, the ATF2500C may be programmed to perform the ATV2500Hs functional subset (no T-type flip-flops, pin clocking or D/T2 feedback) using the ATV2500H JEDEC file. In ...

Page 7

Security Fuse Usage A single fuse is provided to prevent unauthorized copying of ATF2500C fuse patterns. Once pro- grammed, the outputs will read programmed during verify. The security fuse should be programmed last, as its effect is immediate. The ...

Page 8

Figure 8-2. 9. Functional Logic Diagram Description The ATF2500C functional logic diagram describes the interconnections between the input, feed- back pins and logic cells. All interconnections are routed through the single global bus. The ATF2500Cs are straightforward and uniform PLDs. ...

Page 9

Functional Logic Diagram ATF2500C Notes: 1. Pin 4 and Pin 26 are “ground” connections and are not required for PLCC, LCC and JLCC versions of ATF2500C, making them compatible with ATV2500H, ATV2500B and ATV2500BQ pinouts. 2. For DIP package, ...

Page 10

Output Logic, Registered 9.3 Output Logic, Combinatorial Note: 1. These diagrams show equivalent logic functions, not necessarily the actual circuit implementation. ATF2500C 10 ( Output S3 Configuration 0 Active Low 1 Active ...

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Absolute Maximum Ratings* Temperature Under Bias................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C Junction Temperature ............................................. 150°C Max Voltage on Any Pin with Respect to Ground .........................................-2.0V to +7.0V 11. DC and AC Operating Conditions Operating Temperature ...

Page 12

AC Waveforms Input Pin Clock (1) 11.3 AC Waveforms Product Term Clock (1) 11.4 AC Waveforms Combinatorial Outputs and Feedback Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified. ...

Page 13

ATF2500C AC Characteristics Symbol Parameter t Input to Non-registered Output PD1 t Feedback to Non-registered Output PD2 t Input to Non-registered Feedback PD3 t Feedback to Non-registered Feedback PD4 t Input to Output Enable EA1 t Input to Output ...

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ATF2500C Register AC Characteristics, Product Term Clock Symbol Parameter t Clock to Output COA t Clock to Feedback CFA t Input Setup Time SIA t Feedback Setup Time SFA t Hold Time HA t Clock Width WA t Clock ...

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ATF2500C Characterization Data ATF2500C OUTPUT SOURCE CURRENT VS. SUPPLY VOLTAGE (V OH -10 -20 -30 -40 4.50 4.75 5.00 SUPPLY VOLTAGE (V) ATF2500C OUTPUT SINK CURRENT VS. SUPPLY VOLTAGE ( 4.50 ...

Page 16

ATF2500C OUTPUT SOURCE CURRENT VS. OUTPUT VOLTAGE ( 4.5 4.6 4.7 Output Voltage (V) ATF2500C OUTPUT SINK CURRENT VS. OUTPUT VOLTAGE ( 0.0 0.1 0.2 0.3 ...

Page 17

NORMALIZED T VS. SUPPLY VOLTAGE COA (T = 25°C) A 1.3 1.2 1.1 1.0 0.9 0.8 4.50 4.75 5.00 SUPPLY VOLTAGE (V) NORMALIZED T VS. AMBIENT TEMP COA (V = 5V) CC 1.1 1.0 0.9 0.8 -40.0 25.0 AMBIENT TEMPERATURE ...

Page 18

Ordering Information 13.1 Standard Package Options t t Ext COS MAXS (ns) (ns) (MHz 13.2 Military Temperature Grade Standard Package Options t t Ext COS MAXS (ns) (ns) (MHz) ...

Page 19

Packaging Information 14.1 40D6 – DIP (CerDIP) Dimensions in Millimeters and (Inches). Controlling dimension: Inches. MIL-STD 1835 D-5 Config A (Glass Sealed) 5.72(0.225) MAX SEATING PLANE 5.08(0.200) 3.18(0.125) 2.54(0.100)BSC 0.46(0.018) 2325 Orchard Parkway San Jose, CA 95131 R 0777K–PLD–1/24/08 ...

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PDIP A SEATING PLANE Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed ...

Page 21

PLCC 1.14(0.045) X 45˚ 0.51(0.020)MAX 45˚ MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-018, Variation AC. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is .010"(0.254 mm) per ...

Page 22

JLCC D 1.14 X 45˚ .025(.635) RADIUS MAX (3X) Note : Refer to MIL-STD-1835C-J1 2325 Orchard Parkway San Jose, CA 95131 R 15. Revision History ATF2500C 0. TITLE ...

Page 23

Revision Level – Release Date History Added fully Green and Military temperatures packages in J – May 2005 on page K – Jan. 2008 Added 40-pin CerDIP Package Option. 0777K–PLD–1/24/08 18. ATF2500C Section 13. ”Ordering Information” 23 ...

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Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to ...

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