DAC8420QBC AD [Analog Devices], DAC8420QBC Datasheet - Page 15

• Manufacturer Part Number: DAC8420QBC
• Description: Quad 12-Bit Serial Voltage Output DAC
• Manufacturer: AD [Analog Devices]

REV. 0
*
PORTC EQU $1003 Port C control register
*
DDRC EQU $1007 Port C data direction
PORTD EQU $1008 Port D data register
*
DDRD EQU $1009 Port D data direction
SPCR EQU $1028 SPI control register
*
SPSR EQU $1029 SPI status register
*
SPDR EQU $102A SPI data register; Read-Buffer; Write-Shifter
*
* SDI RAM variables: SDI1 is encoded from 0 (Hex) to CF (Hex)
* To select: DAC A – Set SDI1 to $0X
*
SDI1 EQU $00 SDI packed byte 1 “A1,A0,0,0;MSB,DB10,DB9,DB8”
SDI2 EQU $01 SDI packed byte 2
“DB7,DB6,DB5,DB4;DB3,DB2,DB1,DB0”
* Main Program
ORG $C000 Start of user’s RAM in EVB
INIT LDS #$CFFF Top of C page RAM
* Initialize Port C Outputs
*
*
*
* Initialize Port D Outputs
*
M68HC11 Register Definitions
LDAA #$07 0,0,0,0;0,1,1,1
STAA PORTC Initialize Port C Outputs
LDAA #$07 0,0,0,0;0,1,1,1
STAA DDRC CLSEL, CLR, and CS are now enabled as outputs
LDAA #$30 0,0,1,1;0,0,0,0
STAA PORTD Initialize Port D Outputs
LDAA #$38 0,0,1,1;1,0,0,0
STAA DDRD LD,SCLK, and SDI are now enabled as outputs
DAC8420 to M68HC11 Interface Assembly Program
“0,0,0,0;0,CLSEL,CLR,CS”
“0,0,LD,SCLK;SDI,0,0,0”
“SPIE,SPE,DWOM,MSTR;CPOL,CPHA,SPR1,SPR0”
“SPIF,WCOL,0,MODF;0,0,0,0”
DAC B – Set SDI1 to $4X
DAC C – Set SDI1 to $8X
DAC D – Set SDI1 to $CX
SDI2 is encoded from 00 (Hex) to FF (Hex)
DAC requires two 8-bit loads – Address + 12 bits
CLSEL-Hi, CLR-Hi, CS-Hi
To reset DAC to ZERO-SCALE, set CLSEL-Lo ($03)
To reset DAC to MID-SCALE, set CLSEL-Hi ($07)
LD-Hi,SCLK-Hi,SDI-Lo
–15–
* Initialize SPI Interface
* Call update subroutine
* Subroutine UPDATE
UPDATE PSHX
* Enter Contents of SDI1 Data Register (DAC# and 4 MSBs)
* Enter Contents of SDI2 Data Register
* Clear DAC output to zero
* Get DAC ready for data input
TFRLP LDAA 0,X Get a byte to transfer via SPI
WAIT LDAA SPSR Loop to wait for SPIF
*
* Update DAC output with contents of DAC register
(when SPIF is set, SPSR is negated)
LDAA #$5F
STAA SPCR SPI is Master,CPHA=1,CPOL=1,Clk rate=E/32
BSR UPDATE Xfer 2 8-bit words to DAC-8420
JMP $E000 Restart BUFFALO
PSHY
PSHA
LDAA #$80 1,0,0,0;0,0,0,0
STAA SDI1 SDI1 is set to 80 (Hex)
LDAA #$00 0,0,0,0;0,0,0,0
STAA SDI2 SDI2 is set to 00 (Hex)
LDX #SDI1 Stack pointer at 1st byte to send via SDI
LDY #$1000 Stack pointer at on-chip registers
BCLR PORTC,Y $02 Assert CLR
BSET PORTC,Y $02 Deassert CLR
BCLR PORTC,Y $01 Assert CS
STAA SPDR Write SDI data reg to start xfer
BPL WAIT SPIF is the MSB of SPSR
INX
CPX #SDI2+ 1 Are we done yet ?
BNE TFRLP If not, xfer the second byte
BCLR PORTD,Y 520 Assert LD
BSET PORTD,Y $20 Latch DAC register
BSET PORTC,Y $01 De-assert CS
PULA When done, restore registers X, Y & A
PULY
PULX
RTS
** Return to Main Program **
Increment counter to next byte for xfer
Save registers X, Y, and A
DAC8420