DAC702 BURR-BROWN [Burr-Brown Corporation], DAC702 Datasheet - Page 8

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DAC702

Manufacturer Part Number
DAC702
Description
Monolithic 16-Bit DIGITAL-TO-ANALOG CONVERTERS
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet

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Zero Adjustment
For unipolar (CSB) configurations, apply the digital input
code that produces zero voltage or zero current output and
adjust the zero potentiometer for zero output.
For bipolar (COB, CTC) configurations, apply the digital
input code that produces zero output voltage or current. See
Table II for corresponding codes and the Connection Dia-
gram for zero adjustment circuit connections. Zero calibra-
tion should be made before gain calibration.
Gain Adjustment
Apply the digital input that gives the maximum positive
output voltage. Adjust the gain potentiometer for this posi-
tive full scale voltage. See Table II for positive full scale
voltages and the Connection Diagram for gain adjustment
circuit connections.
INSTALLATION
CONSIDERATIONS
This D/A converter family is laser-trimmed to 14-bit linear-
ity. The design of the device makes the 16-bit resolution
available. If 16-bit resolution is not required, bit 15 and bit
16 should be connected to V
resistor.
Due to the extremely high resolution and linearity of the
D/A converter, system design problems such as grounding
and contact resistance become very important. For a 16-bit
converter with a 10V full-scale range, 1LSB is 153 V. With
a load current of 5mA, series wiring and connector resis-
tance of only 30m
1LSB. To understand what this means in terms of a system
layout, the resistance of #23 wire is about 0.021 /ft. Ne-
glecting contact resistance, less than 18 inches of wire will
produce a 1LSB error in the analog output voltage!
In Figures 6, 7, and 8, lead and contact resistances are
represented by R
R
removed during initial calibration. R
output voltage is sensed at Common, and therefore intro-
duces no error. If R
R
1LSB. For example, if R
than 0.08 . R
D/A converter for optimum performance. The effect of R
negligible.
L
L MIN
is constant, R
/2
16
to reduce voltage drops due to wiring to less than
®
L
should be located as close as possible to the
DAC701, 702, 703
1
2
through R
simply introduces a gain error and can be
L
is variable, then R
will cause the output to be in error by
L MIN
5
. As long as the load resistance
is 5k , then R
DD
through a single 1k
3
2
is part of R
should be less than
2
should be less
L
, if the
4
is
8
In many applications it is impractical to sense the output
voltage at the output pin. Sensing the output voltage at the
system ground point is permissible with the DAC700 family
because the D/A converter is designed to have a constant
return current of approximately 2mA flowing from Com-
mon. The variation in this current is under 20 A (with
changing input codes), therefore R
without adversely affecting the linearity of the D/A con-
verter. The voltage drop across R
zero error and can be removed with the zero calibration
adjustment. This alternate sensing point (the system ground
point) is shown in Figures 6, 7, and 8.
Figures 7 and 8 show two methods of connecting the current
output models (DAC702) with external precision output op
amps. By sensing the output voltage at the load resistor (ie,
by connecting R
and R
independent of the value of R
initial calibration adjustments. The effect of R
because it is inside the feedback loop of the output op amp
and is therefore greatly reduced by the loop gain.
FIGURE 6. Output Circuit for Voltage Models.
To +V
To –V
Sense Connection
To V
Alternate Ground
* R = 2k
2
R
F
is greatly reduced. R
B
CC
CC
DD
5k
R
DAC
Common
(DAC701 and DAC703)
F
to the output of A
1µF
1µF
1µF
4k
R
4
R
System Ground
Point
B
1
*
will cause a gain error but is
DAC701
A
L
1
and can be eliminated by
4
(R
4
1
COM
COM
can be as large as 3
at R
4
+V
–V
+V
x 2mA) appears as a
V
OUT
L
Sense Output
), the effect of R
±15VDC
+5VDC
Supply
Supply
R
R
2
2
3
is negligible
R
L
1

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