X9250-2.7 INTERSIL [Intersil Corporation], X9250-2.7 Datasheet
X9250-2.7
Related parts for X9250-2.7
X9250-2.7 Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-352-6832 XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved All other trademarks mentioned are the property of their respective owners. X9250 FN8165.1 integrates 4 digitally ...
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... The SCK input is used to clock data into and out of the X9250. Chip Select (CS) When CS is HIGH, the X9250 is deselected and the SO pin is at high impedance, and (unless an internal write cycle is underway) the device will be in the standby state. CS LOW enables the X9250, placing it in the active power mode ...
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... Finally loaded with the contents of its Data Register zero (DR0) upon power-up. The Wiper Counter Register is a volatile register; that is, its contents are lost when the X9250 is powered- down. Although the register is automatically loaded with the value in R0 upon power-up, this may be different from the value present at power-down ...
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... The WIP bit is read with a read status command. INSTRUCTIONS Identification (ID) Byte The first byte sent to the X9250 from the host, following a CS going HIGH to LOW, is called the Identification byte. The most significant four bits of the slave address are a device type identifier, for the X9250 this is fixed as 0101[B] (refer to Figure 2) ...
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... These instructions transfer data between 1 0 the host and the X9250; either between the host and one of the data registers or directly between the host and the Wiper Counter Register. These instructions are: – Read Wiper Counter Register—read the current wiper position of the selected pot, – ...
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... A1 A0 Figure 6. Three-Byte Instruction Sequence (Read) CS SCL Figure 7. Increment/Decrement Instruction Sequence CS SCK X9250 ...
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... XFR Wiper Counter 1 Register to Data Register Global XFR Data Register 0 to Wiper Counter Register Global XFR Wiper Counter 1 Register to Data Register Increment/Decrement 0 Wiper Counter Register Read Status (WIP bit X9250 Voltage Out Instruction Set ...
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... WCR opcode addresses (sent by Host on SI instruction DR and WCR opcode addresses (sent by X9250 on SO instruction DR and WCR opcode addresses (sent by host on SI) W ...
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... DR CS opcode addresses Rising R R Edge instruction Data Byte opcode (sent by X9250 on SO HIGH-VOLTAGE WRITE CYCLE CS Rising Edge . . . I/D I/D HIGH-VOLTAGE WRITE CYCLE CS Rising W Edge I P FN8165.1 March 25, 2005 ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Max. Device +70°C X9250 +85°C X9250-2.7 Limits Min. Typ. 150 X9250 +4.5 X9250-2.7 +2.7 X9250 -5.5 X9250-2.7 -5 pin -120 0.6 ±300 TOTAL 10/10/25 /R )/255, single pot L Supply Voltage ( ± 10% 2 ...
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... PUR PUW issued. These parameters are periodically sampled and not 100% tested. (7) Sample tested only. A.C. TEST CONDITIONS I nput pulse levels V Input rise and fall times 10ns Input and output timing level V 11 X9250 Limits Min. Typ. Max. 400 0 ...
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... HOLD high to output in low Noise suppression time constant at SI, SCK, HOLD and CS inputs deselect time CS t WP, A0 and A1 setup time WPASU t WP, A0 and A1 hold time WPAH 12 X9250 EQUIVALENT A.C. LOAD CIRCUIT 10pF SDA Output Parameter 5V 2.7V 1533Ω 100pF 100pF Min. ...
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... Don’t Care: Changing: Changes State Not Allowed Known N/A Center Line is High Impedance TIMING DIAGRAMS Input Timing CS t LEAD SCK MSB SI High Impedance SO 13 X9250 Parameter Parameter t CYC ... ... Typ. Max. Unit Min. Max. Unit 10 µs 10 µ ...
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... Output Timing CS SCK t V MSB SO ADDR SI Hold Timing CS SCK HOLD XDCP Timing (for all Load Instructions) CS SCK MSB SI VWx High Impedance SO 14 X9250 ... t HO ... t t HSU HH ... HOLD ... t WRL ... t DIS LSB t LZ LSB FN8165.1 March 25, 2005 ...
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... XDCP Timing (for Increment/Decrement Instruction) CS SCK VWx SI ADDR High Impedance SO Write Protect and Device Address Pins Timing X9250 ... t WRID ... ... Inc/Dec Inc/Dec (Any Instruction WPAH WPASU FN8165.1 March 25, 2005 ...
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... Offset Voltage Adjustment 100kΩ – + TL072 10kΩ 10kΩ 10kΩ +12V -12V 16 X9250 Two terminal Variable Resistor; Variable current Voltage Regulator (REG) = 1.25V (1+R O Comparator with Hysterisis ...
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... -1/2 ≤ G ≤ +1/2 Inverting Amplifier – – + frequency ∝ amplitude ∝ X9250 10kΩ Equivalent L-R Circuit Filter ...
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... PACKAGING INFORMATION Pin 1 Index Pin 1 (4X) 7° 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.015 (0.40) 0.050 (1.27) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 18 X9250 24-Lead Plastic, SOIC, Package Code S24 0.014 (0.35) 0.020 (0.50) 0.598 (15.20) 0.610 (15.49) X 45° 0.009 (0.22) 0.420" 0.013 (0.33) FOOTPRINT 0.393 (10.00) 0.290 (7.37) 0.299 (7.60) 0.420 (10.65) ...
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... BSC .303 (7.70) .311 (7.90) .0075 (.19) .0118 (.30) 0° - 8° .020 (.50) .030 (.75) Detail A (20X) See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 19 X9250 24-Lead Plastic, TSSOP, Package Code V24 .169 (4.3) .252 (6.4) BSC .177 (4.5) .047 (1.20) .002 (.06) .005 (.15) .010 (.25) Gage Plane Seating Plane (1.78) (0 ...
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... However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 20 X9250 ...