ADV7120KN50 AD [Analog Devices], ADV7120KN50 Datasheet - Page 11

• Manufacturer Part Number: ADV7120KN50
• Description: CMOS 80 MHz, Triple 8-Bit Video DAC
• Manufacturer: AD [Analog Devices]

REV. B
Power Planes
The PC board layout should have two distinct power planes,
one for analog circuitry and one for digital circuitry. The analog
power plane should encompass the ADV7120 (V
sociated analog circuitry. This power plane should be connected
to the regular PCB power plane (V
a ferrite bead, as illustrated in Figure 8. This bead should be lo-
cated within three inches of the ADV7120.
The PCB power plane should provide power to all digital logic
on the PC board, and the analog power plane should provide
power to all ADV7120 power pins, voltage reference circuitry
and any output amplifiers.
The PCB power and ground planes should not overlay portions
of the analog power plane. Keeping the PCB power and ground
planes from overlaying the analog power plane will contribute to
a reduction in plane-to-plane noise coupling.
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of multiple decoupling capacitors. (See Figure 8.)
Optimum performance is achieved by the use of 0.1 F ceramic
capacitors. Each of the two groups of V
decoupled to ground. This should be done by placing the ca-
pacitors as close as possible to the device with the capacitor
leads as short as possible, thus minimizing lead inductance.
It is important to note that while the ADV7120 contains cir-
cuitry to reject power supply noise, this rejection decreases with
frequency. If a high frequency switching power supply is used,
the designer should pay close attention to reducing power sup-
ply noise. A dc power supply filter (Murata BNX002) will pro-
vide EMI suppression between the switching power supply and
CC
) at a single point through
AA
should be individually
AA
) and all as-
–11–
the main PCB. Alternatively, consideration could be given to
using a three terminal voltage regulator.
Digital Signal Interconnect
The digital signal lines to the ADV7120 should be isolated as
much as possible from the analog outputs and other analog cir-
cuitry. Digital signal lines should not overlay the analog power
plane.
Due to the high clock rates used, long clock lines to the
ADV7120 should be avoided so as to minimize noise pickup.
Any active pull-up termination resistors for the digital inputs
should be connected to the regular PCB power plane (V
not the analog power plane.
Analog Signal Interconnect
The ADV7120 should be located as close as possible to the out-
put connectors thus minimizing noise pickup and reflections
due to impedance mismatch.
The video output signals should overlay the ground plane, and
not the analog power plane, thereby maximizing the high fre-
quency power supply rejection.
For optimum performance, the analog outputs should each have
a source termination resistance to ground of 75
minated 75
be as close as possible to the ADV7120 so as to minimize
reflections.
Additional information on PCB design is available in an applica-
tion note entitled “Design and Layout of a Video Graphics Sys-
tem for Reduced EMI.” This application note is available from
Analog Devices, publication number E1309-15-10/89.
configuration). This termination resistance should
ADV7120
(doubly ter-
CC
), and