AD7248AAQ AD [Analog Devices], AD7248AAQ Datasheet - Page 11

• Manufacturer Part Number: AD7248AAQ
• Description: LC2MOS 12-Bit DACPORTs
• Manufacturer: AD [Analog Devices]

REV. A
BIPOLAR CONFIGURATION
The bipolar configuration for the AD7245A/AD7248A, which
gives an output voltage range from –5 V to +5 V, is achieved by
connecting the R
and V
dual supplies to achieve this output voltage range. The code
table for bipolar operation is shown in Table IV.
DAC Latch Contents
MSB
1 1 1 1
1 0 0 0
1 0 0 0
0 1 1 1
0 0 0 0
0 0 0 0
NOTE: 1 LSB = 2
AGND BIAS
The AD7245A/AD7248A AGND pin can be biased above sys-
tem GND (AD7245A/AD7248A DGND) to provide an offset
“zero” analog output voltage level. With unity gain on the am-
plifier (R
pressed as:
where D is a fractional representation of the digital word in the
DAC latch and V
AD7248A AGND pin.
Because the current flowing out of the AGND pin varies with
digital code, the AGND pin should be driven from a low imped-
ance source. A circuit configuration is outlined for AGND bias
in Figure 9 using the AD589, a +1.23 V bandgap reference.
If a gain of 2 is used on the buffer amplifier the output voltage,
V
In this case care must be taken to ensure that the maximum out-
put voltage is not greater than V
head must be greater than 3 V to ensure correct operation of the
part. Note that V
be referenced to DGND (system GND). The entire circuit can
be operated in single supply with the V
AD7248A connected to system GND.
OUT
OUT
is expressed as
OFS
. The AD7245A/AD7248A must be operated from
1 1 1 1
0 0 0 0
0 0 0 0
1 1 1 1
0 0 0 0
0 0 0 0
= V
OUT
OFS
Table IV. Bipolar Code Table
DD
BIAS
V
V
OUT
and V
input to REF OUT and connecting R
OUT
= R
is the voltage applied to the AD7245A/
LSB
1 1 1 1
0 0 0 1
0 0 0 0
1 1 1 1
0 0 0 1
0 0 0 0
V
= 2(V
REF
FB
= V
SS
) the output voltage, V
(2
BIAS
for the AD7245A/AD7248A must
BIAS
–11
DD
) = V
+ D
+ D
Analog Output, V
+V
+V
–V
–V
–V
–3 V. The V
REF
REF
REF
REF
REF
REF
SS
0 V
V
V
pin of the AD7245A/
REF
2048
REF
2048
2047
2048
2048
2048
2047
2048
2048
1
1
1
)
DD
OUT
–V
–V
OUT
OUT
is ex-
REF
over-
FB
–11–
PROGRAMMABLE CURRENT SINK
Figure 10 shows how the AD7245A/AD7248A can be config-
ured with a power MOSFET transistor, the VN0300M, to pro-
vide a programmable current sink from V
VN0300M is placed in the feedback of the AD7245A/
AD7248A amplifier. The entire circuit can be operated in single
supply by tying the V
The sink current, I
Using the VN0300M, the voltage drop across the load can typi-
cally be as large as V
+5 V. Therefore, for a current of 50 mA flowing in the R1 (with
all 1s in the DAC register) the maximum load is 200
V
up to 500 mA and still function correctly in the circuit, but in
practice the circuit must be used with larger values of V
otherwise it requires a very small load.
Since the tolerance value on the reference voltage of the
AD7245A/AD7248A is 0.2%, then the absolute value of I
can vary by 0.2% from device to device for a fixed value of R1.
Because the input bias current of the AD7245A/AD7248A’s op
amp is only of the order of picoamps, its effect on the sink cur-
rent is negligible. Tying the R
effect even further and prevents noise pickup which could occur
if the R
SOURCE
OFS
= +15 V. The VN0300M can actually handle currents
Figure 10. Programmable Current Sink
pin was left unconnected.
Figure 9. AGND Bias Circuit
SINK
SOURCE
SS
, can be expressed as:
I
of the AD7245A/AD7248A to AGND.
SINK
–6 V) with V
=
OFS
AD7245A/AD7248A
D V
input to R
R1
REF
OUT
DD
FB
or V
of the DAC at
input reduces this
SOURCE
with
SOURCE
. The
SINK