MAX5952 MAXIM [Maxim Integrated Products], MAX5952 Datasheet - Page 29

• Manufacturer Part Number: MAX5952
• Description: High-Power, Quad, PSE Controller for Power-Over-Ethernet
• Manufacturer: MAXIM [Maxim Integrated Products]

The MAX5952 continuously monitors the power sup-
plies and sets the appropriate bits in the supply event
register (Table 12). V
er V
V
below its undervoltage threshold.
OSC_FAIL is set to 1 whenever the amplitude of the
oscillator signal at the OSC_ input falls below a level
that might compromise the AC disconnect detection
function. OSC_FAIL generates an interrupt only if at
least one of the ACD_EN (R13h[7:4]) bits is set high.
A thermal shutdown circuit monitors the temperature of
the die and resets the MAX5952 if the temperature
exceeds +150°C. TSD is set to 1 after the MAX5952
returns to normal operation. TSD is also set to 1 after
every UVLO reset.
Table 12. Supply Event Register
TSD
V
V
V
V
V
OSC_FAIL
V
DD_UV
DD_OV
DD_UV
EE_UVLO
EE_OV
EE_UV
DD_UVLO
DD
SYMBOL
/V
/V
ADDRESS =
EE
EE_UV
exceeds its overvoltage threshold.
is set to 1 whenever V
______________________________________________________________________________________
DD_OV
BIT
7
6
5
4
3
2
1
0
/V
EE_OV
0Ah
R/W
R
R
R
R
R
R
R
R
High-Power, Quad, PSE Controller
is set to 1 whenev-
0Bh
R/W
CoR
CoR
CoR
CoR
CoR
CoR
CoR
CoR
DD
/V
EE
Overtemperature shutdown
V
V
V
V
V
Oscillator amplitude is below limit
V
DD
DD
EE
EE
EE
DD
falls
undervoltage lockout condition
overvoltage condition
undervoltage condition
overvoltage condition
undervoltage condition
undervoltage lockout condition
for Power-Over-Ethernet
When V
MAX5952 is in reset mode and securely holds all ports
off. When V
UVLO thresholds, the device comes out of reset as
soon as the last supply crosses the UVLO threshold.
The last supply corresponding UV and UVLO bits in the
supply event register is set to 1.
A 1 in any supply event register’s bits forces R00h[7] to
1. As with any of the other events register, the supply
event register has two addresses. When read through
the R0Ah address, the content of the register is left
unchanged. When read through the CoR R0Bh
address, the register content is cleared. A reset sets
R0Ah/R0Bh to 10100001b if V
to 10010100b if V
DD
and/or |V
DD
DESCRIPTION
and |V
EE
EE
comes up after V
EE
| is below its UVLO threshold, the
| rise to above their respective
DD
comes up after V
DD
.
EE
29
or