ADS8472I BURR-BROWN [Burr-Brown Corporation], ADS8472I Datasheet - Page 20

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ADS8472I

Manufacturer Part Number
ADS8472I
Description
16-BIT, 1-MSPS, PSEUDO-BIPOLAR, FULLY DIFFERENTIAL INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH PARALLEL INTERFACE, REFERENCE
Manufacturer
BURR-BROWN [Burr-Brown Corporation]
Datasheet
ADS8472
SLAS514 – DECEMBER 2006
20
The ADS8472 is a high-speed successive approximation register (SAR) analog-to-digital converter (ADC). The
architecture is based on charge redistribution which inherently includes a sample/hold function. See
for the application circuit for the ADS8472.
The conversion clock is generated internally. The conversion time of 650 ns is capable of sustaining a 1 MHz
throughput.
The analog input is provided to two input pins: +IN and –IN. When a conversion is initiated, the differential input
on these pins is sampled on the internal capacitor array. While a conversion is in progress, both inputs are
disconnected from any internal function.
REFERENCE
The ADS8472 can operate with an external reference with a range from 3.0 V to 4.2 V. The reference voltage on
the input pin #13 (REFIN) of the converter is internally buffered. A clean, low noise, well-decoupled reference
voltage on this pin is required to ensure good performance of the converter. A low noise band-gap reference like
the REF3240 can be used to drive this pin. A 0.1- F decoupling capacitor is required between REFIN and
REFM pins (pin #13 and pin #12) of the converter. This capacitor should be placed as close as possible to the
pins of the device. Designers should strive to minimize the routing length of the traces that connect the terminals
of the capacitor to the pins of the converter. An RC network can also be used to filter the reference voltage. A
100-
filter the reference voltage.
The ADS8472 also has limited low pass filtering capability built into the converter. The equivalent circuitry on the
REFIN input ia as shown in
The REFM input of the ADS8472 should always be shorted to AGND. A 4.096-V internal reference is included.
When internal reference is used, pin 14 (REFOUT) is connected to pin 13 (REFIN) with an 0.1- F decoupling
capacitor and 1- F storage capacitor between pin 14 (REFOUT) and pins 11 and 12 (REFM) (see
The internal reference of the converter is double buffered. If an external reference is used, the second buffer
provides isolation between the external reference and the CDAC. This buffer is also used to recharge all of the
capacitors of the CDAC during conversion. Pin 14 (REFOUT) can be left unconnected (floating) if external
reference is used.
series resistor and a 0.1- F capacitor, which can also serve as the decoupling capacitor can be used to
REFIN
Figure
REFM
REF3240
Figure 39. ADS8472 Using External Reference
Figure 40. Simplified Reference Input Circuit
40.
10 kW
PRINCIPLES OF OPERATION
300 pF
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100 W
+
_
REFM
REFIN
0.1 F
m
ADS8472
830 pF
To CDAC
To CDAC
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Figure
Figure 37
38).

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