MAX6443 MAXIM [Maxim Integrated Products], MAX6443 Datasheet - Page 5

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MAX6443

Manufacturer Part Number
MAX6443
Description
?P Reset Circuits with Long Manual Reset Setup Period
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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The reset output is typically connected to the reset
input of a microprocessor (µP). A µP’s reset input starts
or restarts the µP in a known state. The MAX6443–
MAX6452 µP supervisory circuits provide the reset
logic to prevent code-execution errors during power-
up, power-down and brownout conditions (see the
Typical Operating Circuit).
RESET changes from high to low whenever the moni-
tored voltages (RSTIN or V
MAX6443
MAX6444
1
2
3
4
MAX6445
MAX6446
µP Reset Circuits with Long Manual Reset
2
1
3
4
5
_______________________________________________________________________________________
Detailed Description
MAX6447
MAX6448
PIN
2
1
3
4
5
CC
) drop below the reset
MAX6449
MAX6450
Reset Output
2
1
3
4
6
5
MAX6451
MAX6452
2
1
3
4
6
5
RESET
NAME
RSTIN
GND
MR1
MR2
MR2
V
CC
threshold voltages. Once V
respective reset threshold voltages, RESET remains low
for the reset timeout period and then goes high. RESET
is one-shot pulsed whenever selected manual reset
inputs are asserted. RESET stays asserted for the nor-
mal reset timeout period (140ms min).
RESET is guaranteed to be in the proper output logic
state for V
reset logic when V
Valid
RESET Output Down to V
Ground
Acti ve- Low P ush- P ul l or Op en- D r ai n Outp ut. RES ET
chang es fr om hi g h to l ow w hen V
i ts sel ected r eset thr eshol d and r em ai ns l ow for the 210m s
r eset ti m eout p er i od after al l m oni tor ed p ow er - sup p l y i np uts
exceed thei r sel ected r eset thr eshol d s. RES ET i s one- shot
p ul sed l ow for the r eset ti m eout p er i od ( 140m s m i n) after
sel ected m anual r eset i np uts ar e asser ted l ong er than the
sp eci fi ed setup p er i od . For the op en- d r ai n outp ut, use a
m i ni m um 20kΩ p ul l up r esi stor to V
Manual Reset Input, Active Low. Internal 50kΩ pullup to
V
(6.72s) to one-shot pulse RESET for the reset timeout
period.
Manual Reset Input, Active Low. Pull both MR1 and
MR2 low for the typical input pulse width (6.72s) to one-
shot pulse RESET for the reset timeout period.
V
primary microprocessor voltage reset monitor.
Manual Reset Input, Active Low. Internal 50kΩ pullup to
V
pulse width (6.72s) to one-shot pulse RESET for the
reset timeout period.
Manual Reset Input. Pull the MR2 high to immediately
one-shot pulse RESET for the reset timeout period.
Reset Input. High-impedance input to the adjustable
reset comparator. Connect RSTIN to the center point of
an external resistor-divider to set the threshold of the
externally monitored voltage.
CC.
CC
CC
. Pull both MR1 and MR2 low for the typical input
CC
Voltage Input. Power supply and input for the
Pull MR1 low for the typical input pulse width
inputs ≥ 1V. For applications requiring valid
CC
is less than 1V, see the Ensuring a
Setup Period
FUNCTION
RSTIN
CC
Pin Description
C C
= 0V section.
C C
and V
or RS TIN d r op s b el ow
.
CC
exceed their
5

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