AD7766-1 AD [Analog Devices], AD7766-1 Datasheet - Page 22

• Manufacturer Part Number: AD7766-1
• Description: 24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs
• Manufacturer: AD [Analog Devices]

AD7767
V
The AD7767/AD7767-1/AD7767-2 V
5 V input, which is generated by a low noise voltage reference.
Either the
AD7767-1/AD7767-2 device. This reference voltage input also
acts as a power supply to the AD7767/AD7767-1/AD7767-2
device.
The output of the low noise voltage reference does not require a
buffer; however, it is important to provide a passive filter network
between the V
input on the ADC. Figure 46 shows a reference signal network
that can be used with both the ADR445 and the ADR425.
The 100 nF capacitor on the output of the ADR445 or ADR425
stabilizes the reference output voltage. The series resistor coupled
with the other capacitive values on the reference acts as a low-
pass filter. Figure 46 shows the optimal reference voltage input
circuit.
For the capacitor designated C40 in Figure 46, either an
electrolytic or tantalum capacitor can be used. This capacitor
acts as a reservoir of charge. Further decoupling capacitors are
placed as close as possible to the V
ADR445
ADR425
REF+
OR
INPUT SIGNAL
Figure 46. AD7767/AD7767-1/AD7767-2 Reference Filtering,
ADR445
V
OUT
100nF
OUT
C39
5V
ADR445 or ADR425 Circuit Topology
pin of the voltage reference and the V
or the
100Ω
ADR425
C40
100µF
C15
10µF
can be used with the AD7767/
REF+
REF +
pin.
C38
100nF
V
pin is supplied with a
REF+
AD7767-1/
AD7767-2
AD7767/
REF+
Rev. 0 | Page 22 of 24
MULTIPLEXING ANALOG INPUT CHANNELS
The AD7767/AD7767-1/AD7767-2 can be used with a multi-
plexer configuration. As per any converter that uses a digital
filtering block, the maximum switching rate, or output data rate
per channel, is a function of the digital filter settling time.
A user multiplexing the analog inputs to a converter that
employs a digital filter must wait the full digital filter settling
time before a valid conversion result is achieved; at this point,
the channel can be switched. After switching the channel, the
full settling time must again be observed before a valid conver-
sion result is available and the input is switched once more.
The AD7767 filter settling time equals 74 divided by the output
data rate in use. The maximum switching frequency in a
multiplexed application is therefore 1/(74/ODR), where the
output data rate (ODR) is a function of the applied MCLK
frequency and the decimation rate employed by the device in
question. For example, applying a 1.024 MHz MCLK frequency
to the AD7767 gives a maximum output data rate of 128 kHz,
which in turn allows a 1.729 kHz multiplexer switching rate.
The AD7767-1 and the AD7767-2 employ digital filters with
longer settling time to achieve greater precision; thus, the
maximum switching frequency for these devices is 864 Hz and
432 Hz, respectively.