MAX5322EAI MAXIM [Maxim Integrated Products], MAX5322EAI Datasheet - Page 15

• Manufacturer Part Number: MAX5322EAI
• Manufacturer: MAXIM [Maxim Integrated Products]

where:
Bipolar output voltage:
where:
where V
is the bipolar output voltage, LSB
step size, LSB
the reference voltage, and CODE is the decimal equiva-
lent of the binary, 12-bit, DAC input code.
In either case, a 000hex input code produces the mini-
mum output (-2 x V
lar), an 800hex input code produces the midscale
output (zero for bipolar and V
FFFhex input code produces the full-scale output (2 x
V
The output-amplifier section can be configured as either
unipolar or bipolar by the UNI/BIP logic input. With
UNI/BIPA (UNI/BIPB) forced low, SW1 (SW4) and SW2
(SW5) in Figure 1 are closed, and SW3 (SW6) is open.
Figure 4. Basic Inverted DAC Ladder
REF
±10V, Dual, 12-Bit, Serial, Voltage-Output DAC
V
for bipolar and unipolar).
OUT BIP
UNI/BIPA
OUT_UNI
AGND
REFA
_
BIP
=
2R
is the unipolar output voltage, V
LSB
(
LSB
______________________________________________________________________________________
LSB
is the bipolar LSB step size, V
REF
1
UNI
BIP
BIP
for bipolar and zero for unipo-
2R
D0
=
0
=
×
2
4
CODE
R
×
×
2
2
REF
1
V
12
12
DAC REGISTER A
V
REF
Output Amplifiers
UNI
REF
D1
for unipolar), and a
2R
) (
0
−
is the unipolar LSB
2
R
×
1
2R
V
CONTROL LOGIC
D10
REF
2R
0
OUT_BIP
R
)
REF
1
D11
is
2R
0
This configuration channels the DAC output through two
output stages to generate the ±2 x V
The first amplifier generates the ±V
the second amplifier gains it up by two. When configured
for bipolar operation, the MAX5322 must be driven with
dual ±12V to ±15V power supplies.
With UNI/BIPA (UNI/BIPB) forced high, switches SW1
(SW4) and SW2 (SW5) are open and SW3 (SW6) is
closed. This configuration channels the DAC output
through only a single gain stage to generate a 0 to 2 x
V
SPI-/QSPI-/MICROWIRE-compatible devices can be
daisy-chained to reduce I/O lines from the host controller
(Figure 7). Daisy-chain devices by connecting the DOUT
of one device to the DIN of the next, and connect the
SCLK of all devices to a common clock. Data is shifted
out of DOUT 16.5 clock cycles after it is shifted into DIN,
and is available on the rising edge of the 17th clock
cycle. The SPI-/QSPI-/MICROWIRE-compatible serial
interface normally works at up to 10MHz, but must be
slowed to 6MHz if daisy-chaining. DOUT is high imped-
ance when CS is high.
Shutdown is controlled by software commands or by the
SHDN logic input. The SHDN logic input may be imple-
mented at any time. The SPI-/QSPI-/MICROWIRE-com-
patible serial interface remains fully functional, and the
device is programmable while shutdown. When shut
down, the MAX5322 supply current reduces to 2.8µA
REF
output swing.
SW1
2R
SW3
SW2
MAX5322
REF
REF
2R
2R
voltage range and
Daisy-Chaining
output swing.
Shutdown
OUTA
SGNDA
15