MAX6366 MAXIM [Maxim Integrated Products], MAX6366 Datasheet - Page 7

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MAX6366

Manufacturer Part Number
MAX6366
Description
SOT23, Low-Power ?P Supervisory Circuits with Battery Backup and Chip-Enable Gating
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet

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PIN
1
2
3
4
5
6
7
8
with Battery Backup and Chip-Enable Gating
SOT23, Low-Power µP Supervisory Circuits
RESET IN
BATT ON
CE OUT
RESET
RESET
NAME
CE IN
BATT
GND
OUT
WDI
V
MR
_______________________________________________________________________________________
CC
Acti ve- H i g h Reset Outp ut. RE S E T asser ts hi g h conti nuousl y w hen V
M R i s l ow , or RE S E T IN i s l ow . It asser ts i n p ul ses w hen the inter nal w atchd og ti m es out. RE S E T r em ai ns
asser ted for the r eset ti m eout p er i od ( t
i np ut g oes fr om l ow to hi g h, after RE S E T IN g oes hi g h, or after the w atchd og tr i g g ers a r eset event.
RE S E T i s an op en- d r ai n acti ve- hi g h r eset outp ut.
Active-Low Reset Output. RESET asserts low continuously when V
(V
watchdog times out. RESET remains asserted low for the reset timeout period (t
rises above the reset threshold, after the manual reset input goes from low to high, after RESET
IN goes high, or after the watchdog triggers a reset event. The MAX636_L is an active-low push-
pull output, while the MAX636_P is an active-low open-drain output.
Chip-Enable Input. The input to chip-enable gating circuitry. Connect to GND or OUT if not used.
Ground
MAX6365 Manual-Reset Input. Maintaining logic low on MR asserts a reset. Reset output
remains asserted as long as MR is low and for the reset timeout period (t
from low to high. Leave unconnected, or connect to V
pullup to V
MAX6366 Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period (t
timeout period (t
a rising or falling edge (Figure 2).
MAX6367 Battery-On Output. BATT ON goes high when in battery-backup mode.
MAX6368 Reset Input. When RESET IN falls below 1.235V, reset asserts. Reset output remains
asserted as long as RESET IN is low and for at least t
Supply Voltage, 1.2V to 5.5V. Reset asserts when V
(V
above V
Output. OUT sources from V
is below the reset threshold.
Backup-Battery Input. When V
is 20mV greater than V
hysteresis prevents repeated switching if V
Chip-Enable Output. CE OUT goes low only when CE IN is low and reset is not asserted. If CE
IN is low when reset is asserted, CE OUT will stay low for 12µs (typ) or until CE IN goes high,
whichever occurs first.
TH
TH
), the manual reset input is low, or RESET IN is low. It asserts low in pulses when the internal
). Reset remains asserted until V
TH
W D
CC
.
), the internal watchdog timer runs out and a reset pulse is triggered for the reset
.
RP
). The internal watchdog clears whenever reset asserts or whenever WDI sees
C C
. When V
C C
C C
when not in reset and from the greater of V
falls below the reset threshold, OUT switches to BATT if V
C C
RP
C C
) after V
rises 20mV above V
rises above V
CC
FUNCTION
C C
falls slowly.
r i ses ab ove the r eset thr eshol d , after the m anual r eset
C C
RP
CC
TH
drops below the reset threshold voltage
after RESET IN goes high.
if not used. MR has an internal 20kΩ
and for at least t
BATT
C C
, OUT switches to V
i s b el ow the r eset thr eshol d ( V
C C
is below the reset threshold
Pin Description
RP
RP
CC
) after MR transitions
after V
or BATT when V
RP
) after V
C C
C C
. The 40mV
rises
C C
BATT
TH
C C
) ,
7

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