DS80C310-MCL DALLAS [Dallas Semiconductor], DS80C310-MCL Datasheet - Page 12

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DS80C310-MCL

Manufacturer Part Number
DS80C310-MCL
Description
High-Speed Micro
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
3. Idle mode current is measured with a 33 MHz clock source driving XTAL1, V
4. Stop mode current measured with XTAL1 and RST grounded, V
5. When addressing external memory.
6. RST=V
7. During a 0 to 1 transition, a one-shot drives the ports hard for two clock cycles. This measurement
8. Ports 1 and 3 source transition current when being pulled down externally. It reaches its maximum at
9. 0.45<V
10. Current required from external circuit to hold a logic low level on an I/O pin while the corresponding
TYPICAL I
ground, all other pins disconnected.
disconnected.
reflects port in transition mode.
approximately 2V.
is dedicated as an address bus on the DS80C310. Peak current occurs near the input transition point of
the latch, approximately 2V.
port latch bit is set to 1. This is only the current required to hold the low level; transitions from 1 to 0
on an I/O pin will also have to overcome the transition current.
IN
CC
. This condition mimics operation of pins in I/O mode.
<V
CC
CC
VERSUS FREQUENCY Figure 2
. Not a high- impedance input. This port is a weak address holding latch because Port 0
12 of 23
CC
=5.5V, all other pins
CC
=5.5V, R ST at
DS80C310

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