MAX5037 MAXIM [Maxim Integrated Products], MAX5037 Datasheet - Page 27

• Manufacturer Part Number: MAX5037
• Description: VRM 9.0, Dual-Phase, Parallelable, Average Current-Mode Controller
• Manufacturer: MAXIM [Maxim Integrated Products]

Keep the maximum output voltage deviation less than
or equal to the adaptive voltage-positioning window
(∆V
put capacitance discharge and the ESR drop. Use the
following equations to calculate the required ESR and
capacitance value:
where I
response time of the controller. Controller response
time depends on the control-loop bandwidth.
The average current-mode control technique of the
MAX5037 accurately limits the maximum output current
per phase. The MAX5037 senses the voltage across
the sense resistor and limits the peak inductor current
(I
current-sense voltage reaches 45mV (min). Use the fol-
lowing equation to calculate maximum current-sense
resistor value:
where PD
Select 5% lower value of R
parasitics associated with the PC board. Also, select a
non-inductive resistor with the appropriate wattage rating.
The main control loop consists of an inner current loop
and an outer voltage loop. The MAX5037 uses an aver-
age current-mode control scheme to regulate the out-
put voltage (Figure 3). I
average current loops. The VEA output provides the
controlling voltage for these current sources. The inner
current loop absorbs the inductor pole reducing the
order of the outer voltage loop to that of a single-pole
system.
L-PK
OUT
) accordingly. The ON cycle terminates when the
). Assume 50% contribution each from the out-
STEP
R
is the power dissipation in sense resistors.
is the load step and t
C
OUT
R
______________________________________________________________________________________
ESR
PD
SENSE
=
R
I
OUT
STEP
=
PHASE1
2 5 10
=
R
.
SENSE
=
SENSE
×
0 045
I
×
OUT
∆
∆
.
t
I
RESPONSE
STEP
N
V
V
and I
ESR
Q
VRM 9.0, Dual-Phase, Parallelable,
−
to compensate for any
3
PHASE2
Average Current-Mode Controller
Compensation
Current Limit
RESPONSE
are the inner
is the
(18)
(19)
(20)
(21)
A resistive feedback around the VEA provides the best
possible response, since there are no capacitors to
charge and discharge during large-signal excursions.
The required amount of adaptive voltage positioning
(∆V
equation to calculate the value for R
tive voltage positioning:
where G
ber of phases.
When designing the current-control loop ensure that the
inductor downslope (when it becomes an upslope at the
CEA output) does not exceed the ramp slope. This is a
necessary condition to avoid sub-harmonic oscillations
similar to those in peak current-mode control with insuffi-
cient slope compensation. Use the following equation to
calculate the resistor R
For example, the maximum R
1.35mΩ.
C
midband zero. Place a zero at f
at the crossover frequency. Place a high-frequency pole
(f
to achieve maximum phase margin. Use the following
equations to calculate C
P
CF
) at least a decade away from the crossover frequency
OUT
provides a low-frequency pole while R
) determines the VEA gain. Use the following
C
is the current-source gain and N is the num-
R
C
C
R
CF
CF
CFF
F
=
≤
=
N G
2
V
G
=
CF
OUT
2 π
×
×
C
CF
2 π
I
× ×
OUT
:
f
SW
=
× ×
and C
C
0 05
×
R
× ∆
.
× ×
R
×
f
S
1
Z
L
f
SENSE
1
Z
R
CF
P
V
×
IN
CFF
to obtain a phase bump
×
OUT
R
10
is 12kΩ for R
R
CF
:
CF
2
F
when using adap-
CF
provides a
SENSE
(22)
(23)
(24)
(25)
(26)
27
=