MAX500ACWE MAXIM [Maxim Integrated Products], MAX500ACWE Datasheet - Page 5

• Manufacturer Part Number: MAX500ACWE
• Description: CMOS, Quad, Serial-Interface 8-Bit DAC
• Manufacturer: MAXIM [Maxim Integrated Products]

The MAX500 has four matched voltage-output digital-to-
analog converters (DACs). The DACs are “inverted”
R-2R ladder networks which convert 8 digital bits into
equivalent analog output voltages in proportion to the
applied reference voltage(s). Two DACs in the MAX500
have a separate reference input while the other two
DACs share one reference input. A simplified circuit
diagram of one of the four DACs is provided in Figure 1.
Figure 1. Simplified DAC Circuit Diagram
The voltage at the V
the full-scale output of the DAC. The input impedance
_______________Detailed Description
AGND
V
____________________________Typical Operating Characteristics (continued)
2R
REF
16
14
12
10
8
6
4
2
0
DB0
0
V
2R
SS
= -5V
OUTPUT SINK CURRENT
2
DB0
vs. OUTPUT VOLTAGE
DB5
R
R
O
…
…
_______________________________________________________________________________________
4
V
200
…
2R
OUT
REF
(V)
6
DB5
pins (pins 4, 12, and 13) sets
DB6
R
V
SS
2R
= 0V
8
DB6
10
DB7
R
2R
V
12
10
-2
-4
-6
REF
8
6
4
2
0
DB7
CMOS, Quad, Serial-Interface
-55
Input
-25
V
OUT
vs. TEMPERATURE
SUPPLY CURRENT
TEMPERATURE (°C)
0
I
I
DD
SS
25
of the V
value, approximately 11kΩ (5.5kΩ for V
when the input code is 01010101. The maximum value
of infinity occurs when the input code is 00000000.
Because the input resistance at V
dent, the DAC’s reference sources should have an out-
put impedance of no more than 20Ω (no more than
10Ω for V
also code dependent and typically varies from 15pF to
35pF (30pF to 70pF for V
V
programmable voltage source as:
where N
input code.
All voltage outputs are internally buffered by precision
unity-gain followers, which slew at greater than 3V/µs.
When driving 2kΩ in parallel with 100pF with a full-scale
transition (0V to +10V or +10V to 0V), the output settles
to ±1/2LSB in less than 4µs. The buffers will also drive
2kΩ in parallel with 500pF to 10V levels without oscilla-
tion. Typical dynamic response and settling perfor-
mance of the MAX500 is shown in Figures 2 and 3.
A simplified circuit diagram of an output buffer is
shown in Figure 4. Input common-mode range to
AGND is provided by a PMOS input structure. The out-
put circuitry incorporates a pull-down circuit to actively
drive V
(V
OUT
50
SS
). The buffer circuitry allows each DAC output to
C, and V
75
OUT
REF
b
100
REF
is the numeric value of the DAC’s binary
to within +15mV of the negative supply
125
inputs is code dependent. The lowest
A/B). The input capacitance at V
OUT
V
OUT
D can be represented by a digitally
-0.5
-1.0
-1.5
-2.0
2.0
1.5
1.0
0.5
0.0
= N
-55
Output Buffer Amplifiers
b
V
x V
SS
REF
-25
= -5V
REF
V
OUT
A/B). V
8-Bit DAC
ZERO-CODE ERROR
vs. TEMPERATURE
TEMPERATURE (°C)
0
V
D
/ 256
REF
OUT
25
C
V
OUT
REF
is code depen-
OUT
V
B
50
OUT
A/B), occurs
A
A, V
75
100
OUT
REF
125
B,
is
5