AD7376AN50 AD [Analog Devices], AD7376AN50 Datasheet - Page 3

• Manufacturer Part Number: AD7376AN50
• Description: +-15 V Operation Digital Potentiometer
• Manufacturer: AD [Analog Devices]

ABSOLUTE MAXIMUM RATINGS
(T
V
V
V
V
A
Digital Input Voltages to GND . . . . . . . . . . 0 V, V
Digital Output Voltage to GND . . . . . . . . . . . . . . 0 V, +30 V
Operating Temperature Range . . . . . . . . . . . –40 C to +85 C
Maximum Junction Temperature (T
Storage Temperature . . . . . . . . . . . . . . . . . . –65 C to +150 C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300 C
Package Power Dissipation . . . . . . . . . . . . (T
Thermal Resistance
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD7376 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
NOTES
11
12
13
14
15
16
17
18
19
10
11
12
Specifications subject to change without notice.
Typicals represent average readings at +25 C, V
Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper posi-
tions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. See Figure 27. Test Circuit.
INL and DNL are measured at V
specification limits of 1 LSB maximum are Guaranteed Monotonic operating conditions. See Figure 26. Test Circuit.
Resistor terminals A, B, W have no limitations on polarity with respect to each other.
Guaranteed by design and not subject to production test.
Measured at the A terminal. A terminal is open circuit in shutdown mode.
I
P
Bandwidth, noise and settling time are dependent on the terminal resistance value chosen. The lowest R value results in the fastest settling time and highest band-
width. The highest R value results in the minimum overall power consumption.
All dynamic characteristics use V
See timing diagram for location of measured values. All input control voltages are specified with t
of 1.6 V. Switching characteristics are measured using both V
Propagation delay depends on value of V
DD
SS
DD
A
X
A
OL
P-DIP (N-14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92 C/W
SOIC (SOL-16) . . . . . . . . . . . . . . . . . . . . . . . . . . 120 C/W
TSSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 240 C/W
, V
DISS
= +25 C, unless otherwise noted)
– B
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, –16.5 V
= 200 A for the 50 k version operating at V
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +30 V
to V
B
is calculated from (I
, V
X
, A
SS
W
X
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . V
– W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V, +44 V
X
, B
X
Model
AD7376AN10
AD7376AR10
AD7376ARU10
AD7376AN50
AD7376AR50
AD7376ARU50
AD7376AN100
AD7376AR100
AD7376ARU100
AD7376AN1M
AD7376AR1M
AD7376ARU1M
Die Size: 101.6 mil 127.6 mil, 2.58 mm 3.24 mm
Number Transistors: 840
JA
DD
– W
V
X
DD
DD
W
). CMOS logic level inputs result in minimum power dissipation.
with the RDAC configured as a potentiometer divider similar to a voltage output D/A converter. V
. . . . . . . . . . . . . . . . . . .
= +15 V and V
DD
, R
J
MAX) . . . . . . . +150 C
L
and C
DD
DD
k
10
10
10
50
50
50
100
100
100
1,000
1,000
1,000
= +15 V, and V
SS
= +5 V.
= –15 V.
L
see Applications section.
J
MAX – T
DD
DD
= +5 V or +15 V.
SS
+ 0.3 V
SS
20 mA
Temperature
Range
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
–40 C to +85 C
= –15 V.
, V
A
)/
ORDERING GUIDE
DD
JA
–3–
GND
CLK
V
CS
RS
PDIP & TSSOP-14
SS
A
B
NC = NO CONNECT
1
2
3
4
5
6
7
R
Package
PDIP-14
SOL-16
TSSOP-14
PDIP-14
SOL-16
TSSOP-14
PDIP-14
SOL-16
TSSOP-14
PDIP-14
SOL-16
TSSOP-14
Description
(Not to Scale)
= t
TOP VIEW
AD7376
F
= 1 ns (10% to 90% of V
PIN CONFIGURATIONS
14
13
12
11
10
9
8
W
NC
V
SDO
SHDN
SDI
NC
DD
Package
Options
N-14
R-16
RU-14
N-14
R-16
RU-14
N-14
R-16
RU-14
N-14
R-16
RU-14
GND
CLK
V
NC
WARNING!
CS
RS
SS
A
B
DD
NC = NO CONNECT
1
2
3
4
5
6
7
8
) and timed from a voltage level
A
(Not to Scale)
= V
TOP VIEW
SOL-16
AD7376
DD
ESD SENSITIVE DEVICE
and V
16
15
14
13
12
11
10
9
B
AD7376
= 0 V. DNL
W
NC
V
SDO
SHDN
SDI
NC
NC
DD