AD7367-5ARUZ-REEL7 AD [Analog Devices], AD7367-5ARUZ-REEL7 Datasheet - Page 11

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AD7367-5ARUZ-REEL7

Manufacturer Part Number
AD7367-5ARUZ-REEL7
Description
True Bipolar Input, Dual 1us, 14-Bit, 2-Channel SAR ADC
Manufacturer
AD [Analog Devices]
Datasheet
Preliminary Technical Data
ANALOG INPUTS
Each ADC in the AD7367 has two Single Ended Analog Inputs.
Figure 5 shows the equivalent circuit of the analog input
structure of the AD7367. The two diodes provide ESD
protection. Care must be taken to ensure that the analog input
signals never exceed the supply rails by more than 300 mV. This
causes these diodes to become forward-biased and starts
conducting current into the substrate. These diodes can
conduct up to 10 mA without causing irreversible damage to
the part. Capacitor C1 in Figure 5 is typically 5 pF and can
primarily be attributed to pin capacitance. The resistors are
lumped components made up of the on resistance of the
switches. The value of these resistors is typically about TBD Ω.
Capacitor C2 is the ADC’s sampling capacitors with a
capacitance of approximately TBD pF for the ±10V input range
and approximately TBD pF for all other input ranges.
The AD7367 can handle true bipolar input voltages. The Analog
input can be set to one of three ranges; ±10V, ±5V, 0-10V. The
logic levels on pins RANGE0 and RANGE1 determine which
input range is selected as outlined in Table 7. These range bits
should not be changed during the acquisition time prior to a
conversion but may change at any other time.
Table 7. Analog Input Range Selection
RANGE1
AGND
V
IN
0
0
1
1
V
IN
0
SW1
Figure 5 Equivalent Analog Input Structure
Figure 4 ADC Conversion Phase
A
RANGE0
B
C1
0
1
0
1
V
V
DD
SS
D
D
SW2
Range Selected
Do not program
COMPARATOR
0 to 10V
±10V
±5V
R1
C2
CAPACITIVE
CONTROL
LOGIC
DAC
Rev. PrD | Page 11 of 16
The AD7367 requires V
voltage analog input structures. These supplies must be equal to
or greater than ±11.5V. See Table 6 for the requirements on
these supplies. The AD7367 requires a low voltage 4.75V to 5.25
V AV
supply for the Digital Power and a 2.7V to 5.25V V
for the interface power.
Channel selection is made via the ADDR pin as shown in
Table 8. The logic level on the ADDR pin is latched on the rising
edge of BUSY for the next conversion, not the one in progress.
When power is first supplied to the AD7367 the default channel
selection will be V
Table 8. Channel Selection
ADDR
0
1
Transfer Function
The AD7367 output coding is two’s complement. The designed
code transitions occur at successive integer LSB values (i.e. 1
LSB, 2 lSB, and so on). The LSB size is dependant on the analog
input range selected.
Table 9 LSB sizes for each Analog Input Range.
Input Range
±10 V
±5 V
0 to 10 V
The ideal transfer characteristic is shown in Figure 6
CC
supply to power the ADC core, a 4.75V to 5.25V DV
011...111
100...010
100...000
011...110
000...001
000...000
111...111
100...001
Channels Selected
V
V
Full Scale Range/4096
20 V/16384
10 V/16384
10V/16384
A1
A1
A2
-FSR/2
Figure 6.Transfer Characteristic
, V
, V
and V
B1
B2
DD
+ 1LSB
and V
B1
.
ANALOG INPUT
0V
SS
dual supplies for the high
+FSR/2 - 1LSB
1.22mV
0.61mV
0.61mV
LSB Size
DRIVE
AD7367
supply
CC

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