AD7367-5ARUZ AD [Analog Devices], AD7367-5ARUZ Datasheet - Page 15

• Manufacturer Part Number: AD7367-5ARUZ
• Description: 1 MSPS, 8-Channel, Software-Selectable, True Bipolar Input, 12-Bit Plus Sign ADC
• Manufacturer: AD [Analog Devices]

TERMINOLOGY
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale (a point 1 LSB
below the first code transition) and full scale (a point 1 LSB
above the last code transition).
Offset Code Error
This applies to straight binary output coding. It is the deviation
of the first code transition (00 ... 000) to (00 ... 001) from the
ideal, that is, AGND + 1 LSB.
Offset Error Match
This is the difference in offset error between any two input
channels.
Gain Error
This applies to straight binary output coding. It is the deviation
of the last code transition (111 ... 110) to (111 ... 111) from the
ideal (that is, 4 × V
after adjusting for the offset error.
Gain Error Match
This is the difference in gain error between any two input
channels.
Bipolar Zero Code Error
This applies when using twos complement output coding and a
bipolar analog input. It is the deviation of the midscale transition
(all 1s to all 0s) from the ideal input voltage, that is, AGND − 1 LSB.
Bipolar Zero Code Error Match
This refers to the difference in bipolar zero code error between
any two input channels.
Positive Full-Scale Error
This applies when using twos complement output coding and
any of the bipolar analog input ranges. It is the deviation of the
last code transition (011 … 110) to (011 … 111) from the ideal
(4 × V
adjusting for the bipolar zero code error.
Positive Full-Scale Error Match
This is the difference in positive full-scale error between any
two input channels.
REF
− 1 LSB, 2 × V
REF
− 1 LSB, 2 × V
REF
− 1 LSB, V
REF
REF
− 1 LSB, V
− 1 LSB) after
REF
− 1 LSB)
Rev. 0 | Page 15 of 40
Negative Full-Scale Error
This applies when using twos complement output coding and
any of the bipolar analog input ranges. This is the deviation of
the first code transition (10 … 000) to (10 … 001) from the ideal
(that is, −4 × V
after adjusting for the bipolar zero code error.
Negative Full-Scale Error Match
This is the difference in negative full-scale error between any
two input channels.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode after the
14
time required for the output of the track-and-hold amplifier to
reach its final value, within ±½ LSB, after the end of a conversion.
Signal to (Noise + Distortion) Ratio
This is the measured ratio of signal to (noise + distortion) at
the output of the A/D converter. The signal is the rms amplitude
of the fundamental. Noise is the sum of all nonfundamental
signals up to half the sampling frequency (f
The ratio is dependent on the number of quantization levels in
the digitization process. The more levels, the smaller the quan-
tization noise. Theoretically, the signal to (noise + distortion) ratio
for an ideal N-bit converter with a sine wave input is given by
For a 13-bit converter, this is 80.02 dB.
Total Harmonic Distortion
Total harmonic distortion (THD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7329, it is defined as
where V
V
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
the fundamental. Normally, the value of this specification is
determined by the largest harmonic in the spectrum, but for
ADCs where the harmonics are buried in the noise floor, the
largest harmonic could be a noise peak.
4
th
, V
SCLK rising edge. Track-and-hold acquisition time is the
Signal to (Noise + Distortion) = (6.02 N + 1.76) dB
THD
5
, and V
1
is the rms amplitude of the fundamental, and V
(
dB
6
)
are the rms amplitudes of the second through the
REF
=
20
S
+ 1 LSB, −2 × V
/2, excluding dc) to the rms value of
log
V
2
2
+
V
3
2
REF
+
V
+ 1 LSB, −V
V
1
4
2
+
S
V
/2), excluding dc.
5
2
+
V
REF
6
2
AD7329
+ 1 LSB)
2
, V
3
,