DS1554-100 DALLAS [Dallas Semiconductor], DS1554-100 Datasheet - Page 8

no-image

DS1554-100

Manufacturer Part Number
DS1554-100
Description
256K NV Y2KC Timekeeping RAM
Manufacturer
DALLAS [Dallas Semiconductor]
Datasheet
ALARM MASK BITS Table 3
When the RTC Register values match Alarm Register settings, the Alarm Flag bit (AF) is set to a 1. If
Alarm Flag Enable (AE) is also set to a 1, the alarm condition activates the
signal is cleared by a read or write to the Flags Register (Address 7FF0h) as shown in Figure 2 and 3. The
active, but is not guaranteed to be cleared unless t
write to the Flags Register but the flag will not change states until the end of the read/write cycle and the
CLEARING IRQ WAVEFORMS Figure 2
CLEARING IRQ WAVEFORMS Figure 3
IRQ
IRQ
AM4
/FT signal may be cleared by having the address stable for as short as 15 ns and either
/FT signal has been cleared.
1
1
1
1
0
AM3
1
1
1
0
0
AM2
1
1
0
0
0
AM1
1
0
0
0
0
ALARM RATE
Once per second
When seconds match
When minutes and seconds match
When hours, minutes, and seconds match
When date, hours, minutes, and seconds match
8 of 21
RC
is fulfilled. The alarm flag is also cleared by a read or
IRQ
/FT pin. The
CE
IRQ
or
DS1554
WE
/FT

Related parts for DS1554-100