AD8332 AD [Analog Devices], AD8332 Datasheet
AD8332
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AD8332 Summary of contents
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... The operating temperature range is –40°C to +85°. The AD8331 is available in a 20-lead QSOP package, and the AD8332 in 28-lead TSSOP and 32-lead LFCSP packages. They require a single 5 V supply, and the quiescent power consumption is 125 mW/ch. A power-down (enable) pin is provided ...
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... AD8331/AD8332 TABLE OF CONTENTS REVISION HISTORY.................................................................. 2 AD8331, AD8332—Specifications.................................................. 3 Absolute Maximum Ratings............................................................ 6 ESD CAUTION ............................................................................ 6 AD8331, AD8332—Typical Performance Characteristics .......... 7 Test Circuits..................................................................................... 15 Theory of Operation ...................................................................... 17 Overview...................................................................................... 17 Low Noise Amplifier (LNA)...................................................... 17 Variable Gain Amplifier............................................................. 19 Postamplifier ............................................................................... 21 Applications..................................................................................... 22 REVISION HISTORY Revision C 11/03—Data Sheet Changed from REV REV. C Addition of New Part ...
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... AD8331, AD8332—SPECIFICATIONS Table 25° 500 Ω pin floating, –4 +43.5 dB gain (HILO = LO), and differential output voltage, unless otherwise specified. CM Parameter LNA CHARACTERISTICS Gain Input Voltage Range Input Resistance Input Capacitance Output Impedance –3 dB Small Signal Bandwidth ...
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... Harmonic Distortion HD2 HD3 HD2 HD3 Input 1 dB Compression Point Two-Tone Intermodulation Distortion (IMD3) Output Third Order Intercept Channel-to-Channel Crosstalk (AD8332) Overload Recovery Group Delay Variation ACCURACY 2 Absolute Gain Error 3 Gain Law Conformance Channel-to-Channel Gain Matching GAIN CONTROL INTERFACE ...
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... Logic Level for Negative Gain Slope Input Resistance POWER SUPPLY (Pins VPS1, VPS2, VPSV, VPSL, VPOS) Supply Voltage Quiescent Current per Channel Power Dissipation per channel Disable Current AD8332 (VGA and LNA) AD8331 (VGA and LNA) AD8332 (ENBL) AD8332 (ENBV) AD8331 (ENBL) AD8331 (ENBV) PSRR Conditions R = 2.74 kΩ ...
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... JA 4 RU-28 Package (AD8332) 5 CP-32 Package (AD8332) 4 RQ-20 Package (AD8331) θ RU-28 Package (AD8332) CP-32 Package (AD8332 RQ-20 Package (AD8331) 4 Four-Layer JEDEC Board (2S2P). 5 Exposed pad soldered to board, nine thermal vias in pad — JEDEC 4-Layer Board J-STD-51-9. ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection ...
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... AD8331, AD8332—TYPICAL PERFORMANCE CHARACTERISTICS T = 25° 500 Ω –4 +43.5 dB gain (HILO = LO), and differential signal voltage, unless otherwise specified HILO = MODE = HILO = LO 0 –10 0 0.2 0.4 0.6 V (V) GAIN Figure 3. Gain vs. V and MODE (MODE Available on AC Package) GAIN 2 ...
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... AD8331/AD8332 GAIN 50 0.8V 40 0.6V 30 0. –10 100k 1M 10M FREQUENCY (Hz) Figure 9. Frequency Response for Various Values 0.5 V GAIN 50Ω, 75Ω, 100Ω 1kΩ 500Ω 200Ω –10 –20 –30 –40 ...
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... –5 –10 –15 100M –20 100k Figure 20. LNA Frequency Response, Unterminated, Single-Ended Rev Page AD8331/AD8332 50j 100j 25j f = 100kHz = 50 Ω 270 Ω Ω 412 Ω Ω = 200 Ω , ...
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... AD8331/AD8332 500 f = 10MHz 400 300 200 HILO = HI 100 HILO = 0.2 0.4 0.6 V (V) GAIN Figure 21. Output-Referred Noise vs. V 1.6 = ∞ GAIN HILO = 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 100k 1M FREQUENCY (Hz) Figure 22. Short-Circuit Input-Referred Noise vs. Frequency 100 = ∞ HILO = 10MHz 10 1 0.1 0 0.2 0.4 0.6 V (V) GAIN Figure 23 ...
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... GAIN = 30 dB –50 –60 –70 –80 –90 –100 100M 0 Figure 32. Harmonic Distortion vs. Differential Output Voltage Rev Page AD8331/AD8332 f = 10MHz p-p OUT HILO = LO, HD3 HILO = LO, HD2 HILO = HI, HD2 HILO = HI, HD3 200 400 600 800 1.0k 1.2k 1.4k 1 ...
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... AD8331/AD8332 p-p OUT –20 INPUT RANGE LIMITED WHEN HILO = LO HILO = LO, –40 HD3 HILO = LO, HD2 –60 –80 HILO = HI, HD3 –100 –120 0 0.1 0.2 0.3 0.4 0.5 0.6 V (V) GAIN Figure 33. Harmonic Distortion vs p-p OUT –20 HILO = LO, HD2 INPUT RANGE –40 LIMITED WHEN HILO = LO –60 –80 HILO = HI, ...
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... G = 40dB –1 –2 – –4 –10 200mV 100 Figure 44. LNA Overdrive Recovery p-p Burst, V Rev Page AD8331/AD8332 HILO = HI HILO = Ω CLMP Figure 42. Clamp Level vs. R CLMP R = 48.1kΩ 16.5kΩ CLMP CLMP R = 7.15kΩ 2.67kΩ ...
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... Figure 48. Enable Response, Large Signal, Top Bottom 150 mV p-p ENB OUT INH VPS1 0.5V GAIN VPSV 0.5V GAIN VPS1, V GAIN 1M 10M FREQUENCY (Hz) Figure 49. PSRR vs. Frequency (No Bypass Capacitor 0.5V GAIN AD8332 AD8331 –20 TEMPERATURE (°C) Figure 50. Quiescent Supply Current vs. Temperature = 0V 100M 80 100 ...
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... BEAD Figure 52. Transient Measurements A G FB* 0.1µF 0.1µF 49Ω 120nH INH 1Ω DUT 22pF LMD 50Ω 0.1µF 0.1µF Figure 53. Used for Noise Measurements Rev Page AD8331/AD8332 28Ω 1:1 28Ω OSCILLOSCOPE 50Ω IN 1:1 SPECTRUM ANALYZER B 50Ω IN 1:1 *FERRITE BEAD ...
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... AD8331/AD8332 1.8nF 270Ω 237Ω FB* 0.1µF 0.1µF 120nH INH 28Ω DUT 22pF LMD 50Ω 237Ω 0.1µF 0.1µF 28Ω *FERRITE BEAD Figure 54. Distortion NETWORK ANALYZER 50Ω 50Ω OUT IN 50Ω 1.8nF 270Ω FB* 237Ω 0.1µF 120nH 0.1µF INH 28Ω ...
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... THEORY OF OPERATION OVERVIEW The following discussion applies to all part numbers. Figure 56 and Figure 1 are functional block diagrams of the AD8331 and AD8332, respectively. LON LOP VIP VIN VPOS VCM VPSL 3 V AD8331 COML 6 VGA INH 2 ∆ –48dB to 0dB LNA ...
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... AD8331/AD8332 A simplified schematic of the LNA is shown in Figure 59. INH is capacitively coupled to the source. An on-chip bias generator centers the output dc levels at 2.5 V and the input voltages at 3. capacitor C of the same value as the input coupling LMD capacitor C is connected from the LMD pin to ground. ...
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... VGA with 3.75 nV/√Hz, would yield a noise figure degradation of approximately 1.5 dB (for most input impedances), significantly worse than the AD8332 performance. The equivalent input noise of the LNA is the same for single- ended and differential output applications. The LNA noise figure improves to 3 Ω ...
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... GAIN minimum or maximum gain values. Both channels of the AD8332 are controlled from a single gain interface to preserve matching. Gain can be calculated using Equations 1 and 2. Gain accuracy is very good since both the scaling factor and absolute gain are factory trimmed. The overall accuracy relative to the theoretical gain expression is ± ...
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... The accuracy of the clamping levels is approximately ± mode. Figure 65 illustrates the output characteristics for a few values CLMP 5.0 4.5 = ∞ R CLMP 4.0 8.8k Ω 3.5 3.5k Ω 3.0 = 1.86k Ω 2.5 R CLMP 2.0 1.5 1.0 0.5 0 –3 –2 –1 Figure 65. Output Clamping Characteristics Rev Page AD8331/AD8332 VOH VOL (V) INH ...
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... C (pF 1.2 Figure 66. Basic Connections for a Typical Channel (AD8332 Shown) None None ) is FB Both LNA outputs are available for driving external circuits. Pin LOP should be used in those instances when a single-ended LNA output is required. The user should be aware of stray capacitance loading of the LNA outputs, in particular LON. The LNA can drive 100 Ω ...
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... Gain Input Pin GAIN is common to both channels of the AD8332. The input impedance is nominally 10 MΩ and a bypass capacitor from 100 pF to1 nF is recommended. Parallel connected devices may be driven by a common voltage source or DAC. Decoupling should take into account any bandwidth considerations of the drive waveform, using the total distributed capacitance ...
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... AD8331/AD8332 Table 4. Clamp Resistor Values Clamp Level Clamp Resistor Value (kΩ) (V p-p) HILO = LO 0.5 1.21 1.0 2.74 1.5 4.75 2.0 7.5 2.5 11 3.0 16.9 3.5 26.7 4.0 49.9 4.4 100 Output Filtering and Series Resistor Requirements To ensure stability at the high end of the gain control range, series resistors or ferrite beads are recommended for the outputs when driving large capacitive loads, or circuits on other boards, ...
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... In this mode, the LNA input and output pins may be left unconnected, however the power must be connected to all the supply pins for the disabling circuit to function. Figure 74 illustrates the connections using an AD8331 as an example. Rev Page AD8331/AD8332 must be placed nearby the LON pin as well. FB ...
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... Using the circuit shown, and a high speed ADC FIFO evaluation kit connected to a laptop PC, an FFT can be performed on the AD8332. With the on-board clock of 20 MHz, and minimal low-pass filtering, and both channels driven with a 1 MHz filtered sine wave, the THD is –75 dB, noise floor –93 dB 1.13kΩ ...
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... VOL1 120nH L10 COM VPSV 120nH FB R26 +5VGA 100Ω C45 C85 0.1µF 1nF Figure 76. Schematic, TGC, VGA Section Rev Page AD8331/AD8332 TP6 L13 C60 120nH FB 0.1µ C79 IN1 22 PF CFB1 18nF RFB1 274Ω C42 C59 0.1µF 0.1µ ...
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... AD8331/AD8332 VR1 ADP3339AKC-3.3 L5 C44 120nH FB +3.3VCLK 1µF +5V + C31 0.1µ OUT GND L4 120nH FB +3.3VADDIG OUT C30 0.1µ F TAB L3 120nH FB +3.3VAVDD C29 0.1µ 120nH FB +3.3VDVDD C1 µ 0.1 F +3.3VCLK R18 S2 C63 499Ω EXT CLOCK 0.1µF R16 5kΩ R17 R19 49.9Ω 499Ω ...
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... C75 10µF 0.1µF 0.1µF 0.1µF 6. Figure 78. Interface Schematic Rev Page AD8331/AD8332 R40 22Ω × × RP2 ...
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... AD8331/AD8332 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD8331 PIN 1 LMD 1 20 IDENTIFIER INH 2 19 VPSL 3 18 LON 4 17 AD8331 LOP 5 TOP VIEW 16 (Not to Scale) COML 6 15 VIP 7 14 VIN 8 13 MODE 9 12 GAIN 10 11 Figure 79. 20-Lead QSOP Table 5. 20–Lead QSOP (RQ PACKAGE) Pin No ...
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... Rev Page AD8331/AD8332 PIN 1 COMM LON1 1 24 INDICATOR VOH1 VPS1 2 23 INH1 3 VOL1 22 AD8332 VPSV LMD1 4 21 TOP VIEW LMD2 (Not to Scale) VOL2 INH2 6 19 VPS2 7 18 VOH2 8 LON2 17 COMM ...
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... Evaluation Board with AD8331ARQ Thin Shrink Small Outline Package (TSSOP) Thin Shrink Small Outline Package (TSSOP) Thin Shrink Small Outline Package (TSSOP) Lead Frame Chip Scale Package (LFCSP) Lead Frame Chip Scale Package (LFCSP) Evaluation Board with AD8332ARU C03199-0-11/03(C) Rev Page 0.341 BSC ...