AD2S80ASE AD [Analog Devices], AD2S80ASE Datasheet - Page 3

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AD2S80ASE

Manufacturer Part Number
AD2S80ASE
Description
Variable Resolution, Monolithic Resolver-to-Digital Converter
Manufacturer
AD [Analog Devices]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AD2S80ASE
Manufacturer:
ADI
Quantity:
9
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Manufacturer:
INVENSENSE
Quantity:
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Part Number:
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Quantity:
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Parameter
DATA LOAD
BUSY
DIRECTION
RIPPLE CLOCK
DIGITAL INPUTS
DIGITAL INPUTS
DIGITAL INPUTS
DIGITAL OUTPUTS
THREE-STATE LEAKAGE
NOTES
1
2
3
Specifications subject to change without notice.
All min and max specifications are guaranteed. Specifications in boldface are tested on all production units at final electrical test.
REV. A
Refer to small signal bandwidth.
Output offset dependent on value for R6.
Refer to timing diagram.
Sense
Sense
Width
Load
Sense
Max Load
Sense
Width
Reset
Load
High Voltage, V
Low Voltage, V
High Current, I
Low Current, I
Low Voltage, V
Low Current, I
High Voltage, V
Low Voltage, V
Current I
3
L
3
IL
IL
3
IL
IL
OL
IH
IH
OH
Conditions
Internally Pulled High (100 k )
to +V
Data to be Loaded into the
Counters from the Data Lines
Logic HI When Position O/P
Changing
Use Additional Pull-Up
Logic HI Counting Up
Logic LO Counting Down
Logic HI
All 1s to All 0s
All 0s to All 1s
Dependent on Input Velocity
Before Next Busy
INHIBIT, ENABLE
DB1–DB16, Byte Select
INHIBIT, ENABLE
DB1–DB16, Byte Select
INHIBIT, ENABLE
DB1–DB16
INHIBIT, ENABLE
DB1–DB16, Byte Select
ENABLE = HI
SC1, SC2, Data Load
ENABLE = HI
SC1, SC2, Data Load
DB1–DB16
RIPPLE CLK, DIR
I
DB1–DB16
RIPPLE CLK, DIR
I
DB1–DB16 Only
V
V
OH
OL
V
V
V
V
V
V
V
V
V
OL
V
OH
S
S
S
S
S
S
S
S
S
S
= 1.2 mA
= 100 A
= 10.8 V, V
= 13.2 V, V
= 13.2 V , V
= 13.2 V, V
= 12.0 V, V
= 12.0 V, V
= 12.0 V, V
= 12.0 V, V
= 12.0 V, V
= 0 V
= 12.0 V, V
= 5.0 V
S
. Logic LO Allows
L
L
L
L
L
L
L
L
L
L
= 5.0 V
= 5.0 V
= 5.5 V
= 5.0 V
= 5.0 V
= 4.5 V
= 5.5 V
= 5.5 V
= 5.5 V
= 5.5 V
–3–
Min
200
300
2.0
2.4
AD2S80A
Typ
150
Max
300
600
1
3
3
0.8
1.0
–400
0.4
100
100
100
100
AD2S80A
Units
ns
ns
LSTTL
LSTTL
LSTTL
V
V
V
V
V
A
A
A
A
A

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