MC146805E2CFN INNOVASIC [InnovASIC, Inc], MC146805E2CFN Datasheet - Page 13

• Manufacturer Part Number: MC146805E2CFN
• Description: Microprocessor Unit
• Manufacturer: INNOVASIC [InnovASIC, Inc]

IA6805E2
Microprocessor Unit
Stop Modes:
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innovASIC
The stop instruction places the MPU in low power consumption mode. The stop instruction
disables clocking of most internal registers. Timer control register bits 6 and 7 (TCR6 and
TCR7) are altered to remove any pending timer interrupt requests and to disable any further
timer interrupts. The DS and AS output lines go “low” and the RW_n line goes “high”. The
multiplexed address/data bus goes to the data input state. The high order address lines
remain at the address of the next instruction. External interrupts are enabled by clearing the
I bit in the condition code register. All other registers, memory, and I/O remain unaltered.
Only an external interrupt or reset will bring the MPU out of the stop mode. Figure 11
shows a flowchart of the stop function.
2002
The End of Obsolescence
N
Figure 11. STOP Function Flowchart
INTERRUPT?
EXTERNAL
Y
ENG21108140100
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N
OR RESET VECTOR
FETCH EXTERNAL
TCR BIT 7 <= 0
TCR BIT 6 <= 1
CLEAR I BIT
INTERRUPT
RESET?
STOP
Y
As of Production Version 00
Data Sheet
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