ADF4360-7 AD [Analog Devices], ADF4360-7 Datasheet
ADF4360-7
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ADF4360-7 Summary of contents
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... Trademarks and registered trademarks are the property of their respective owners. Integrated Synthesizer and VCO GENERAL DESCRIPTION The ADF4360 integrated integer-N synthesizer and voltage controlled oscillator (VCO). The ADF4360-7 center frequency is set by external inductors. This allows a frequency range of between 350 MHz to 1800 MHz. In addition, a divide- by-2 option is available, whereby the user receives an RF output of between 175 MHz and 900 MHz ...
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... ADF4360-7 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Revision History ............................................................................... 2 Specifications ..................................................................................... 3 Timing Characteristics ..................................................................... 5 Absolute Maximum Ratings ............................................................ 6 Transistor Count ........................................................................... 6 ESD Caution .................................................................................. 6 Pin Configuration and Function Descriptions ............................. 7 Typical Performance Characteristics ............................................. 8 Circuit Description ......................................................................... 10 Reference Input Section ............................................................. 10 Prescaler (P ...................................................................... 10 A and B Counters ....................................................................... 10 R Counter .................................................................................... 10 PFD and Charge Pump ...
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... DV – 0.4 V min CMOS output chosen. DD 500 μA max 0.4 V max I = 500 μA. OL 3.0/3.6 V min/V max typ 2.5 mA typ 14.0 mA typ mA. CORE 3.5 to 11.0 mA typ RF output stage is programmable. 7 μA typ Rev Page 4.7 kΩ. SET ≤ 2 ≤ 2 ADF4360-7 ...
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... ADF4360-7 Parameter 5 RF OUTPUT CHARACTERISTICS Maximum VCO Output Frequency Minimum VCO Output Frequency VCO Output Frequency VCO Frequency Range VCO Sensitivity 6 Lock Time Frequency Pushing (Open Loop) Frequency Pulling (Open Loop) Harmonic Content (Second) Harmonic Content (Third Output Power Output Power Variation ...
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... DB22 DB2 (CONTROL BIT C2) Figure 2. Timing Diagram Rev Page ADF4360 unless otherwise noted. A MIN MAX Test Conditions/Comments LE Setup Time DATA to CLOCK Setup Time DATA to CLOCK Hold Time CLOCK High Duration CLOCK Low Duration CLOCK to LE Setup Time ...
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... ADF4360-7 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 3. Parameter GND GND VCO VCO DD Digital I/O Voltage to GND Analog I/O Voltage to GND REF to GND IN Operating Temperature Range Maximum Junction Temperature CSP θ Thermal Impedance JA Paddle Soldered ...
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... Control Input to the VCO. This voltage determines the output frequency and is derived from filtering the CP output voltage. TUNE external inductor to AGND should be connected to this pin to set the ADF4360-7 output frequency. L1 and L2 need to be the same value. For inductances greater than 3.3 nH, a 470 Ω resistor should be added in parallel to AGND external inductor to AGND should be connected to this pin to set the ADF4360-7 output frequency. L1 and L2 need to be the same value. For inductances greater than 3.3 nH, a 470 Ω ...
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... ADF4360-7 TYPICAL PERFORMANCE CHARACTERISTICS –40 –50 –60 –70 –80 –90 –100 –110 –120 –130 –140 –150 100 1k 10k 100k FREQUENCY OFFSET (Hz) Figure 4. Open-Loop VCO Phase Noise, L1 –70 –75 –80 –85 –90 –95 –100 –105 –110 –115 –120 –125 –130 – ...
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... MHz Channel Spacing, 25 kHz Loop Bandwidth) Rev Page ADF4360 3.3V 3.3V DD VCO REFERENCE I = 2.5mA CP LEVEL = –3.5dBm PFD FREQUENCY = 200kHz LOOP BANDWIDTH = 10kHz RES. BANDWIDTH = 30Hz VIDEO BANDWIDTH = 30Hz SWEEP = 1 ...
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... ADF4360-7 CIRCUIT DESCRIPTION REFERENCE INPUT SECTION The reference input stage is shown in Figure 16. SW1 and SW2 are normally closed switches. SW3 is normally open. When power-down is initiated, SW3 is closed, and SW1 and SW2 are opened. This ensures that there is no loading of the REF on power-down ...
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... PFD frequency exceeds 1 MHz, the divide ratio should be set to allow enough time for correct band selection. Rev Page ADF4360-7 Data Latch Control Latch R Counter N Counter (A and B) Test Mode Latch ) and resultant V 500 550 600 650 FREQUENCY (MHz) , ADF4360-7 TUNE TUNE ...
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... Another feature of the ADF4360 family is that the supply current to the RF output stage is shut down until the part achieves lock as measured by the digital lock detect circuitry. This is enabled by the mute-till-lock detect (MTLD) bit in the control latch. BUFFER/ VCO DIVIDE BY 2 Figure 21. Output Stage ADF4360-7 and DD Rev Page Data Sheet . DD ...
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... DB6 DB5 DB4 DB3 B2 B1 RSV DB9 DB8 DB7 DB6 DB5 DB4 DB3 ADF4360-7 CONTROL BITS DB2 DB1 DB0 PC1 C2 (0) C1 (0) CONTROL BITS DB2 DB1 DB0 A1 C2 (1) C1 (0) CONTROL BITS DB2 DB1 DB0 C2 (0) C1 (1) R1 ...
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... ADF4360-7 Table 7. Control Latch PRESCALER CURRENT VALUE SETTING 2 DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 P2 P1 PD2 PD1 CPI6 CPI5 CPI4 CPI6 CPI5 CPI3 CPI2 PL2 ...
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... PRESCALER VALUE SET IN THE CONTROL LATCH. B MUST BE GREATER THAN OR EQUAL TO A. FOR CONTINUOUSLY ADJACENT VALUES OF (N × THE OUTPUT, N REF ADF4360-7 CONTROL BITS DB2 DB1 DB0 C2 ( COUNTER DIVIDE RATIO ...
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... ADF4360-7 Table 9. R Counter Latch BAND BACKLASH SELECT CLOCK DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 RSV RSV BSC2 BSC1 TMB LDP ABP2 TEST MODE BIT SHOULD BE SET TO 0 FOR NORMAL THESE BITS ARE NOT OPERATION ...
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... VCO may not oscillate at the desired frequency, which does not allow the band select logic to choose the correct frequency band, and the ADF4360-7 may not achieve lock. If the recommended interval is inserted, and the N counter latch is programmed, the band select logic can choose the correct frequency band, and the part locks to the correct frequency ...
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... ADF4360-7 Hardware Power-Up/Power-Down If the part is powered down via the hardware (using the CE pin) and powered up again without any change to the N counter register during power-down, the part locks at the correct frequency, because the part is already in the correct frequency band. The lock time depends on the value of capacitance on the C pin, which is < ...
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... R counter and the A, B counters are reset. For normal operation, this bit should be 0. Core Power Level PC1 and PC2 set the power level in the VCO core. The recommended setting is 5 mA. See the truth table in Table 7. Rev Page ADF4360-7 ...
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... ADF4360-7 N COUNTER LATCH Table 8 shows the input data format for programming the N counter latch. A Counter Latch program the 5-bit A counter. The divide range is 0 (00000 (11111). Reserved Bits DB7 is a spare bit that is reserved. It should be programmed Counter Latch B13 to B1 program the B counter ...
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... This allows frequencies as low as 8 MHz and as high as 137 MHz to be generated using a single system. In the circuit drawn in Figure 23, the ADF4360-7 is being used to generate 1024 MHz, and the ADF4007 is being used to divide provide a channel spacing of 100 kHz, a PFD frequency of 800 kHz is used for the ADF4360-7 PLL ...
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... FIXED FREQUENCY LO Figure 26 shows the ADF4360-7 used as a fixed frequency LO at 500 MHz. The low-pass filter was designed using ADIsimPLL for a channel spacing of 8 MHz and an open-loop bandwidth of 30 kHz ...
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... The via diameter should be between 0.3 mm and 0.33 mm, and the via barrel should be plated with 1 ounce of copper to plug the via. The user should connect the printed circuit thermal pad to AGND. This is internally connected to AGND. Rev Page ADF4360-7 SCLOCK SCLK MOSI SDATA TFS ...
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... Experiments have shown that the circuit shown in Figure 30 provides an excellent match to 50 Ω over a limited operating range of the ADF4360-7 (850 MHz to 950 MHz). This gives approximately −2 dBm output power across the specific frequency range of the ADF4360-7 using 3.9 nH. For other frequencies, a tuned LC is recommended ...
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... COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-2 Figure 32. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ × Body, Very Thin Quad (CP-24-2) Dimensions shown in millimeters Frequency Range 350 MHz to 1800 MHz 350 MHz to 1800 MHz 350 MHz to 1800 MHz Rev Page ADF4360 2.45 EXPOSED PAD 2. ...
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... ADF4360-7 NOTES Rev Page Data Sheet ...
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... Data Sheet NOTES Rev Page ADF4360-7 ...
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... ADF4360-7 NOTES Purchase of licensed components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I 2 Rights to use these components system, provided that the system conforms to the I ©2004-2012 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...