MAX9792 MAXIM [Maxim Integrated Products], MAX9792 Datasheet - Page 25

• Manufacturer Part Number: MAX9792
• Description: Windows Vista-Compliant Class D Speaker Amplifiers with DirectDrive Headphone Amplifiers
• Manufacturer: MAXIM [Maxim Integrated Products]

Connect a 1µF capacitor between CPVSS and PGND.
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance, as well as route heat away
from the device. Good grounding improves audio per-
formance, minimizes crosstalk between channels, and
prevents switching noise from coupling into the audio
signal. Connect PGND and GND together at a single
point on the PCB. Route PGND and all traces that carry
switching transients away from GND, and the traces
and components in the audio signal path.
Connect C2 to the PGND plane. Place the charge-
pump capacitors (C1, C2) as close as possible to the
device. Bypass PVDD with a 0.1µF capacitor to PGND.
Place the bypass capacitors as close as possible to the
device.
The MAX9791/MAX9792 is inherently designed for
excellent RF immunity. For best performance, add
ground fills around all signal traces on top or bottom
PCB planes.
Amplifiers with DirectDrive Headphone Amplifiers
Windows Vista-Compliant Class D Speaker
______________________________________________________________________________________
Layout and Grounding
Output Capacitor (C2)
Use large, low-resistance output traces. As load imped-
ance decreases, the current drawn from the device out-
puts increase. At higher current, the resistance of the
output traces decrease the power delivered to the load.
For example, if 2W is delivered from the speaker output
to a 4Ω load through a 100mΩ trace, 49mW is wasted
in the trace. If power is delivered through a 10mΩ
trace, only 5mW is wasted in the trace. Large output,
supply, and GND traces also improve the power dissi-
pation of the device.
The MAX9791/MAX9792 thin QFN package features an
exposed thermal pad on its underside. This pad lowers
the package’s thermal resistance by providing a direct
heat conduction path from the die to the printed circuit
board. Connect the exposed thermal pad to GND by
using a large pad and multiple vias to the GND plane.
PROCESS: BiCMOS
Chip Information
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