LV8111V_0910 SANYO [Sanyo Semicon Device], LV8111V_0910 Datasheet - Page 11

• Manufacturer Part Number: LV8111V_0910
• Description: For Polygon Mirror Motor 3-phase Brushless Motor Driver
• Manufacturer: SANYO [Sanyo Semicon Device]

3-phase Logic Truth Table
S/S Pin
CSDSEL Pin
LV8111V Description
1. Speed Control Circuit
2. Output Drive Circuit
3. Current Limiter Circuit
4. Power Saving Circuit
5. Reference Clock
IN1
This IC can realize a high efficiency, low-jitter, a stable rotation by adopting the PLL speed control method.
This the PLL circuit compares the phase difference of the edge between the CLK signal and the FG signal and controls
by using the output of error. The FG servo frequency under control becomes congruent with the CLK frequency.
This IC adopts the direct PWM drive method to reduce power loss in the output. The output transistor is always
saturated while the transistor is on and adjusts the driving force of the motor by changing the duty that the output
transistor is on.
The PWM switching of the output is performed by the upper-side output transistor.
Also, this IC has a parasitic diode of the output DMOS as a regeneration route when the PWM switching is off.
But, this IC is cut down the fever than the diode regeneration by performing synchronous rectification.
This IC limits the (peak) current at the value
operation has a delay (approximately 300ns). In case of a coil resistance of motor is small or small inductance, since
the current change at start-up is fast, there is a possibility that the current more than specified current is flowed by this
delay.
It is necessary to set the current increases by the delay.
This IC becomes the power saving state of decreasing the consumption current in the stop state. The bias current of the
majority circuits is cut in the power saving state. Also, 5V regulator output is output in the power saving state.
Note that externally-applied clock signal has no noise of chattering. The input circuit has a hysteresis.
But, if noise is a problem, that noise must be excluded by inserting capacitors across the inputs.
If clock input goes to the no input state when the IC is in the start state, the drive is turned off after a few rotation of
motor if the motor constrained protection circuit does operate. (Clock disconnection protection)
H
H
H
L
L
L
The current limitation operation consists of reducing the PWM output on duty to suppress the current.
To prevent malfunction of the current limitation operation when the reverse recovery current of diode is detected, the
High or Open
High or Open
Input state
Input state
Low
Low
f FG (Servo) = f CLK
I = V RF / Rf (V RF = 0.515V (typical), Rf : current detection resister)).
F/R = H
IN2
H
H
H
L
L
L
IN3
H
H
H
L
L
L
FG standard
LD standard
Mode
Mode
Stop
Start
(IN = “H” indicates the state where in IN + > IN − )
IN1
L
H
H
H
L
L
F/R = L
IN2
H
H
H
L
L
L
LV8111V
IN3
H
H
H
L
L
L
BRSEL Pin
SDCC Select
OUT1
F/R = High or Open
M
M
H
H
L
L
High or Open
Input state
Input state
F/R = Low
Low
Output
OUT2
M
M
H
H
L
L
OUT3
Short-circuit brake
M
M
H
H
L
L
While stopped
Function OFF
Function ON
Free run
Mode
No.A1416-11/13