MAX3804ETE MAXIM [Maxim Integrated Products], MAX3804ETE Datasheet - Page 5

• Manufacturer Part Number: MAX3804ETE
• Description: 12.5Gbps Settable Receive Equalizer
• Manufacturer: MAXIM [Maxim Integrated Products]

The MAX3804’s low-noise linear input stage includes
two amplifiers, one with flat-frequency response, and
one with response that compensates for the loss
characteristic of an FR-4 PC board transmission line.
A current-steering network allows the designer to
control the amount of equalization to match the path
loss for specific applications. This network consists of a
pair of variable attenuators feeding into a summing
node. Equalization is set by a 3-bit LVTTL-compatible
input (EQ3, EQ2, and EQ1). By employing fixed control
of the equalization level, the MAX3804 provides optimal
performance for a specific path loss. A high-speed
limiting amplifier follows the equalizer circuitry to shape
the output signal (see Figure 1).
13, 14
8, 16
9, 12
PIN
1, 4
EP
10
11
15
2
3
5
6
7
Exposed Pad
NAME
SDO+
SDO-
V
SDI+
V
GND
N.C.
SDI-
EQ1
EQ2
EQ3
V
_______________________________________________________________________________________
General Theory of Operation
CC1
CC2
CC
Detailed Description
CML Input Supply Voltage. Connect to +1.8V to +3.3V for DC-coupled CML. Input can also be
AC-coupled.
Positive Serial Data Input, CML
Negative Serial Data Input, CML
Equalizer Boost Control Logic Input LSB, LVTTL. See Table 1.
Equalizer Boost Control Logic Input, LVTTL. See Table 1.
Equalizer Boost Control Logic Input MSB, LVTTL. See Table 1.
Supply Ground
CML Output Supply Voltage. Connect to +1.8V to +3.3V for DC-coupled CML. Output can also be
AC-coupled.
Negative Serial Data Output, CML
Positive Serial Data Output, CML
No Connection. Leave unconnected.
+3.3V Core Supply Voltage
Ground. Must be soldered to the circuit board ground for proper thermal and electrical performance
(see the Package and Layout Considerations section).
12.5Gbps Settable Receive Equalizer
The MAX3804 input and output CML buffers are termi-
nated with 50Ω to V
equivalent circuit for the output is shown in Figure 2.
Separate supply voltage connections are provided for
the core (V
ry to control noise coupling, and to allow DC-coupling
to +1.8V, +2.5V, or +3.3V CML ICs. The CML inputs
and outputs can also be AC-coupled.
Use AC-coupling for single-ended cable applications.
The unused CML input must be connected through an
AC-coupling capacitor to a 50Ω termination.
The low-frequency cutoff of the input-stage offset-can-
cellation circuit is nominally 21kHz.
FUNCTION
CC
), input (V
CML Input and Output Buffers
CC1
CC1
and V
), and output (V
Pin Description
CC2
, respectively. The
CC2
) circuit-
5