W83194R-630 WINBOND [Winbond], W83194R-630 Datasheet - Page 9

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W83194R-630

Manufacturer Part Number
W83194R-630
Description
166MHZ CLOCK FOR SIS CHIPSET
Manufacturer
WINBOND [Winbond]
Datasheet
8.2 SERIAL CONTROL REGISTERS
The Pin column lists the affected pin number and the @PowerUp column gives the state at true power
up. Registers are set to the values shown only on true power up. "Command Code" byte and "Byte
Count" byte must be sent following the acknowledge of the Address Byte. Although the data (bits) in
these two bytes are considered "don't care", they must be sent and will be acknowledge. After that,
the below described sequence (Register 0, Register 1, Register 2, ....) will be valid and acknowledged.
8.2.1 Frequency table by I2C
SSEL3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
SSEL2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
SSEL1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
SSEL0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
(MHZ)
100.2
133.6
100.2
100.2
133.6
CPU
66.8
83.3
66.8
95.2
96.2
140
112
166
- 9 -
75
97
97
SDRAM
(MHZ)
100.2
100.2
100.2
133.6
150.3
133.6
129.3
83.3
66.8
95.2
96.2
140
112
166
75
97
Publication Release Date:May 13, 2005
W83194R-630/-630A
PCI (MHZ)
33.4
33.4
33.2
33.4
37.5
33.4
33.4
33.4
33.4
32.3
32.3
31.7
37.3
32.1
33.3
35
REF (MHZ)
IOAPIC
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
14.318
Revision A1

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