LMX2330-332A NSC [National Semiconductor], LMX2330-332A Datasheet - Page 12

• Manufacturer Part Number: LMX2330-332A
• Manufacturer: NSC [National Semiconductor]

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Functional Description
Note 6: The I
Note 7: Activation of the IF PLL or RF PLL powerdown modes result in the disabling of the respective N counter divider and debiasing of its respective f
(to a high impedance state). The powerdown function is gated by the charge pump to prevent unwanted frequency jumps. Once the powerdown program mode is
loaded, the part will go into powerdown mode when the charge pump reaches a TRI-STATE condition. The R counter functionality does not become disabled until
both IF and RF powerdown bits are activated. The MICROWIRE control register remains active and capable of loading and latching data during all of the powerdown
modes.
X = don’t care condition
Note 8: When the F
Note 9: Lock detect output provided to indicate when the VCO frequency is in “lock.” When the loop is locked and a lock detect mode is selected, the pins output
is HIGH, with narrow pulses LOW. In the RF/IF lock detect mode a locked condition is indicated when RF and IF are both locked.
Note 10: The Fastlock mode utilizes the F
occurs whenever the RF loop’s lcpo magnitude bit # 17 is selected HIGH (while the # 19 and # 20 mode bits are set for Fastlock).
Note 11: The Counter Reset mode bits R19 and R20 when activated reset all counters. Upon removal of the Reset bits then N counter resumes counting in “close”
alignment with the R counter. (The maximum error is one prescaler cycle.) If the Reset bits are activated the R counter is also forced to Reset, allowing smooth ac-
quisition upon powering up.
RF R[19]
0
1
(RF LD)
0
0
1
1
X
X
X
X
0
0
1
1
Phase Detector Polarity
CPo
LOW current state = 1/4 x I
o
LD output is disabled, it is actively pulled to a low logic state.
Negative
Positive
C1
0
0
IF R[19]
(IF LD)
C2
0
1
0
1
0
1
0
0
1
1
0
1
0
1
o
LD output pin to switch a second loop filter damping resistor to ground during fastlock operation. Activation of Fastlock
CPo
Detector Polarity
Detector Polarity
TABLE 3. The F
(Continued)
D
HIGH current.
RF Phase
IF Phase
o
TRI-STATE
C1
Operation
1
1
TRI-STATE
R16
Normal
TABLE 2. Mode Select Truth Table
TABLE 1. Programmable Modes
RF R[20]
(RF F
C2
0
1
0
0
0
0
0
1
0
1
1
1
1
1
o
o
LD (Pin 10) Output Truth Table
)
RF Prescaler
(Note 6)
IF Prescaler
RF I
IF I
HIGH
LOW
R17
I
CP o
CP o
N19
12
CP o
Prescaler
IF R[20]
TRI-STATE
TRI-STATE
16/17
(IF F
8/9
IF
RF D
IF D
0
0
0
0
1
0
1
0
1
1
1
1
R18
Pwdn RF
o
Pwdn IF
)
o
N20
o
2330A RF
Prescaler
32/33
64/65
Disabled (Note 8)
IF Lock Detect (Note 9)
RF Lock Detect (Note 9)
RF/IF Lock Detect (Note 9)
IF Reference Divider Output
RF Reference Divider Output
IF Programmable Divider Output
RF Programmable Divider Output
Fastlock (Note 10)
For Internal Use Only
For Internal Use Only
Counter Reset (Note 11)
RF LD
IF LD
R19
2331A/32A RF
Prescaler
RF F
IF F
128/129
R20
F
64/65
o
Output State
o
o
(Note 7)
Pwdn
Pwrd
Pwrd
Up
Dn
IN
inputs